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Hi
In F280049C, all peripherals can be used either in main CPU or CLA, these can be set at register GPxCSELy.GPIOn,
Since some peripherals are only accessed from registers in the interrupt routine, so even they are used in CLA,
the program can still set them to the main CPU and set register values in CLA interrupt routine.
For example, the program may set PWM1 to CPU1 but it still can set eCMP1.CMPA value to renew PWM1's duty cycle.
Could you please list all peripherals that are used in CLA but program can them to CPU1 at the register GPxCSELy.GPIOn?
Thanks,
Jiakai
Hi Jaikai,
Are you looking for information on which peripherals are accessible by CPU and CLA, then that information is listed in the data sheet, look at section " Bus Architecture – Peripheral Connectivity" of of F28004x datasheet.
Let me know if there are further questions.
Thanks,
Ashwini
Hi Ashwini,
Thank you for the quick reply.
I know some peripherals can be accessed by both CPU1 and CLA1, I want to know the difference if the program
sets a peripheral to CPU1 or CLA1.
If a peripheral is set to CPU1, can program set the peripheral's register in CLA?
If yes, that means the peripheral registers can be updated from both CPU1 and CLA1, How does F280049C handle access conflicts?
Thanks,
Jiakai
Hi Jiakai,
Please see section "5.2.3 Shared Peripherals and EALLOW Protection" in the TRM which talks about arbitration for shared peripheral access.
Thanks,
Ashwini