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TMS320F28377S: How to compensate the ADC errors under different temperature

Part Number: TMS320F28377S


Hi experts, 

My customer did high/low-temperature test on their control board based on two F28377S (More specifically it is F28377SZWTQ YFC-09A26SW). And they got following results: 

  

The horizontal axis represents test index (or time frame). The left vertical-axis represents voltage (after analog front-end circuit and SW post-processing, and 4V represents that the ADC channel input is 0.96 V). And the right vertical-axis represents temperature. On the other hand, the ADC reference is 3V. 

As you can see, the ADC value varies a lot when the temperature changes to 75°C (about 98 ADC LSB). Strangely, two chips (with same part number) has different variation. But they are in a same board and under same temperature condition. And I don't think it is caused by different CPU/Peripherals load, please correct me if it is.

On the other hand, the chip boots from Flash mode, so Device_cal function is executed in Boot firmware. 

So what I and my customer want to know is why this phenomenon happened and how to compensate this variation more than calling Device_cal? Thanks for your help. 

Best Regards, 

Will 

  • The ADC reference voltage and input voltage have no change under 75°C test environment. 

  • Hi Will,

    Can you provide some details on how the ADC was configured?

    1.) Mode (singe-ended or differential)

    2.) 12-bit mode/16-bit mode

    3.) SYSCLK and ADCLK speed

    4.) ACQPS settings

    5.) Is is possible to know the input circuit impedance? If not, can we take a look at the schematics showing the ADC input network?

    Thanks,

    Joseph

  • Hi Joseph, 

    Thanks for your input. I will collect the information that you want and will give feedback soon. 

    Best Regards, 

    Will  

  • Hi Joseph, 

    1.) Mode (singe-ended or differential)

    single-ended mode

    2.) 12-bit mode/16-bit mode

    12-bit mode

    3.) SYSCLK and ADCLK speed

    SYSCLK=200MHz, ADCCLT2.PRESCALE=6 which means ADCCLK=SYSCLK/4.0

    4.) ACQPS settings

    ACQPS=14 which means ADC sample window equals to 15 SYSCLKs (75 ns). 

    5.) Is is possible to know the input circuit impedance? If not, can we take a look at the schematics showing the ADC input network?

    Best Regards, 

    Will 

  • Hi Will,

    Thank you for getting all these information, especially the schematics.  Primarily, we have not seen such dependency on conversion accuracy of the F28377S ADC when we characterized the performance across voltage and temperature corners which extended from -40C to +125C. I do not see any issues with the ADC configuration but have some doubt on the buffer circuit, especially on the op amp feedback where there is a 0.1uF cap (C208).  This would affect the total impedance as seen by the ADC input and the 75ns SH may be too low to settle the signal and charge the sampling capacitor.

    One experiment that you can ask from customer side to prove/disprove this is for them to read out the actual voltage at TP313 with a precision voltmeter while temperature is ramping up/down while input to the buffer is held constant.  If the voltage readings do not change with temperature, then it could be a settling time issue.  For this, increase ACQPS temporarily to a large number, (ex, about 300, for a ~1.5uS SH) to see if readings stabilize across temperature, or just have customer experiment with higher ACQPS if they do not have precision voltmeters to monitor the level as TP313.

    Regards,

    Joseph

       

  • Hi Joseph, 

    Thanks for your guidance and sorry for my late reply. I have let them to improve the ACQPS to 300 but they said it has no effect. 

    I have following thoughts:

    1). in their schematic, only one resistance (R123) but not a RC circuit placed at the ADC input; 

    2). the front-end analog conditioning circuit doesn't have a suitable input impedance to ADC, so I think they should replace the feedback resistance/capacitor with a 0 ohm resistance. Please correct me if it is not necessary or not correct. 

    3). I suggest them to use an additional SOC to sample the VREFLOx (x=A, B, C) with input channel 8/9, and as the offset compensation. 

    Please give your comments about above thoughts. Thanks. 

    Best Regards, 

    Will 

  • Hi Will,

    The increase in sampling time usually addresses settling time issue and not sure changing R123 to 0 ohms will help either.  The temperature dependency probably is coming from one of the components.  I'm looking at the specs of the schottky protection diode D16, shunted on the input pin.  The datasheet of BAT54S has a strong temperature dependency on temperature for the reverse current.  It is showing a current change of ~100ua from 25C to 125C (fig2 on the BAT845S DS).  That current change is significant enough to affect the ADC conversions across temperature.  Is it possible to request customer to depop or temporarily remove D16 from the circuit and redo the conversions over temperature?

    Regards,

    Joseph

  • Hi Joseph, 

    They removed the BAT54S and tested in similar condition, the results were same. 

    Best Regards, 

    Will 

  • Hi Will,

    To isolate where the temperature degradation is happening, is it possible to depopulate R123 and apply a fixed voltage, maybe 1v,  on TP313 (with D16 also depopulated) and do a conversion across temperature?  This is just to isolate the op-amp and the input divider network from the circuit, to see if there is still temperature dependency?

    Thanks,

    Joseph