Hi
I tried to use CBC module of F28069. I programmed PWM4A/B and PWM5A/B to be switch off on compactor COMP2A event. For application needs, PWM4 and PWM5 are phased of 45°. Comparator occurs one time when PWM4 is positive and one time when PWM5 is positive. Here under abstract of the configuration code.
I use DacDrvCnf.c to set comparator. Comparator2 must switch off both PWMs at the same time.
DacDrvCnf(2, Voltage, 0, 0, 0);
PWM init
//*****************************************************
// INIT FOR PWM4
//*****************************************************
// Define an event (DCAEVT2) based on Comparator 1 Output
(*ePWM[n]).DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP2OUT; // DCAH = Comparator 2 output
(*ePWM[n]).TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI;
// as Comparator output goes high)
(*ePWM[n]).DCACTL.bit.EVT2SRCSEL = DC_EVT_FLT; //DC_EVT2;
(*ePWM[n]).DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC; //
// Enable DCAEVT2 as CBC source
(*ePWM[n]).TZSEL.bit.DCAEVT2 = 1; //CBC
// What do we want the DCAEVT1 and DCBEVT1 events to do?
(*ePWM[n]).TZCTL.bit.TZA = TZ_FORCE_LO; // EPWMxA will go low
(*ePWM[n]).TZCTL.bit.TZB = TZ_FORCE_LO; // EPWMxB will go low
(*ePWM[n]).TZEINT.bit.DCAEVT2 = 1; //Enable IT
//===========================================================================
// Event Filtering Configuration
(*ePWM[n]).DCFCTL.bit.SRCSEL = DC_SRC_DCAEVT2;
(*ePWM[n]).DCFCTL.bit.BLANKE = DC_BLANK_ENABLE;
(*ePWM[n]).DCFCTL.bit.PULSESEL = DC_PULSESEL_ZERO;
(*ePWM[n]).DCFOFFSET = 2; // Blanking Window Offset = CMPA(n+1)
(*ePWM[n]).DCFWINDOW = 10; // Blanking window length - initial value
//===========================================================================
//*****************************************************
// INIT FOR PWM5
//*****************************************************
// Define an event (DCAEVT2) based on Comparator 1 Output
(*ePWM[n+1]).DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP2OUT; // DCAH = Comparator 2 output
(*ePWM[n+1]).TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; // DCAEVT1 = DCAH high(will become active
// as Comparator output goes high)
(*ePWM[n+1]).DCACTL.bit.EVT2SRCSEL = DC_EVT_FLT; //DC_EVT2;
(*ePWM[n+1]).DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC; // Take async path
// Enable DCAEVT2 as a CBC
(*ePWM[n+1]).TZSEL.bit.DCAEVT2 = 1;
// What do we want the DCAEVT1 and DCBEVT1 events to do?
(*ePWM[n+1]).TZCTL.bit.TZA = TZ_FORCE_LO; // EPWMxA will go low
(*ePWM[n+1]).TZCTL.bit.TZB = TZ_FORCE_LO; // TZ_FORCE_LO; // EPWMxB will go low
(*ePWM[n+1]).TZEINT.bit.DCAEVT2 = 1; // enable IT
//===========================================================================
// Event Filtering Configuration
(*ePWM[n+1]).DCFCTL.bit.SRCSEL = DC_SRC_DCAEVT2;
(*ePWM[n+1]).DCFCTL.bit.BLANKE = DC_BLANK_ENABLE;
(*ePWM[n+1]).DCFCTL.bit.PULSESEL = DC_PULSESEL_ZERO;
(*ePWM[n+1]).DCFOFFSET = 2; // Blanking Window Offset = CMPA(n+1)
(*ePWM[n+1]).DCFWINDOW = 10; // Blanking window length - initial value
//===========================================================================
EDIS;
and in other part
__interrupt void epwm4_tz1_int_isr(void){
CountEvent++;
EALLOW;
EPwm4Regs.TZCLR.all = 0xFF; // Clear Flags
EDIS;
// Acknowledge this interrupt to receive more interrupts from group 2
PieCtrlRegs.PIEACK.bit.ACK4 = 1;
}
Same code for PWM5.
=> Interrupts work well and properly.
=> CBC flag, DCAEVT2 flag and INT flag appeared for PWM4 and 5
I cleared IT and CBC flags BUT for me CBC should reactivate automatically PWMs without need of IT or clearing flag, rights ?
What I would like to do is switching off PWM4 A/B and PWM5 A/B on COMP2A event but I would like that PWMs restart to continue their cyle on the half period or on period event (if COMP event disappeared obviously) WITHOUT INTs or clearing flags.
How to perform it ? I hope I was clear...
Thanks for your help
Ol
