TMS320F28388D: Delay in responding to NMI Interrupt

Irene Boben

Part Number: TMS320F28388D

Hi Team,

I am working on NMI Interrupts. In my program the NMI Interrupt is enabled 'NmiIntruptRegs.NMICFG.bit.NMIE = 1;'. When an NMI occurs, I see the corresponding flag and NMIINT flag is set in NmiIntruptRegs.NMIFLG register. When these flags are set the 'NmiIntruptRegs.NMIWDCNT' is 0 but by the time we service these ISR i.e. the ISR function is called, NmiIntruptRegs.NMIWDCNT is some number greater than 15 but less than NmiIntruptRegs.NMIWDPRD.

Basically, I am observing some delay between the flags being set and then ISR called. Couple of statements in the main function are executed before the ISR is invoked.

Is this delay expected? NMI has priority '3' which is more than any other PIE Interrupt group.

Kind regards,

Irene

over 3 years ago

0 Vince over 3 years ago

TI__Mastermind 19795 points

Hi Irene,

I will double check with the flash experts on this, but the only item I can think of that could delay this is wait stated memory. Essentially pipeline stall due to memory timing, particularly flash. Please allow me some time to sync with the other members, I will try to have a response by early next week. In the meantime, if you could provide whether you are running from RAM vs FLASH, that would help solidify this as well.

Regards,

Vince

0 Irene Boben over 3 years ago in reply to Vince

Expert 1030 points

Hi Vince,

I am running from Flash.

Kind regards,

Irene

0 Vince over 3 years ago in reply to Irene Boben

TI__Mastermind 19795 points

Hi Irene,

Thanks for letting me know, this will help as we look into this.

Regards,

Vince

+1 Vince over 3 years ago in reply to Vince

TI__Mastermind 19795 points

Hi Irene,

I think this may actually be the issue then, the flash performance times, as outlined in the TRM, are below:

This seems to be directly the times you are seeing, in addition to the ISR entry time required for saving registers upon entry.

Let me know if you have any questions on this.

Recommendation for faster reaction if needed would be to move any critical ISR to be in RAM rather than flash.

Regards,

Vince

0 Vince over 3 years ago in reply to Vince

TI__Mastermind 19795 points

Hi Irene,

One additional note after confirming with flash owner:

The delay will only be on the first read, subsequent reads should happen sequentially. Make sure Pre-Fetch & Data cache is enabled.

Regards,

Vince

0 Irene Boben over 3 years ago in reply to Vince

Expert 1030 points

Hi Vince,

Thank you for your quick response. Just a follow up question: 'does this mean by the time ISR is answered, other statements will be executed?'

Kind regards,

Irene

+1 Vince over 3 years ago in reply to Irene Boben

TI__Mastermind 19795 points

Hi Irene,

Yes, for the first flash read, other statements will be executed.

Regards,

Vince

0 Irene Boben over 3 years ago in reply to Vince

Expert 1030 points

Thank you Vince!

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TMS320F28388D: Delay in responding to NMI Interrupt