Hello everybody
I have a question for EPWM. I want to use EPWM1A and EPWM1B separately. For example EPWM1A can be activated and change its duty cycle how i want to and EPWM1B at the same time be at low or high without changing its duty cycle. And also the other way where EPWM1B is working and EPWM1A is "waiting".
By working them both alone (disable either one) they are working as intended with the good duty cycle and outputs. But as soon as I use them both at the same time they seem to be walking over each other.
What i want as final signal on my output of EPWM1A (top) and EPWM1B(bottom) With a different sine wave as modulation:
Alone they are working fine like this :
But as soon as I put them at the same time there seems to be a problem :
My code is this (image or text) :
void init_epwm1(void){ EPwm1Regs.TBCTL.bit.FREE_SOFT = 0x02; // free run // Setup TBCLK EPwm1Regs.TBPRD = PWR_IN_CNT_PRD; // Set timer period 2500 EPwm1Regs.TBPHS.all = 0; EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; EPwm1Regs.TBCTR = 0x0000; // Clear counter // Set Compare values EPwm1Regs.CMPA.bit.CMPA = 500; // Set compare A EPwm1Regs.CMPB.bit.CMPB = 1000; // Set Compare B // Setup counter mode EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module enable phase loading EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; // Sync A and B disable EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to PWM_CLOCK_FREQ EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; // Setup shadowing EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // Setup Output A and B with count up and down EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set actions for EPWM1A EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; // Set actions for EPWM1B EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR; EPwm1Regs.DBCTL.bit.OUT_MODE = DB_DISABLE; //Disable Dead-band module // EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LO; // Active Low // EPwm1Regs.DBFED.bit.DBFED = PWM_DEAD_TIME_COUNT; // 100 TBCLKs = 1us // EPwm1Regs.DBRED.bit.DBRED = PWM_DEAD_TIME_COUNT; // 100 TBCLKs = 1us // Trip-Zone // EPwm1Regs.TZSEL.bit.OSHT1 = TZ_ENABLE; // enables TZ1 as a one-shot event source for ePWM1 EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // Force EPWMxA to a low state EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Force EPWMxB to a low state EPwm1Regs.TZFRC.bit.OST = 0x1; // Software Force Trip Zone }
So if you have any more questions or solutions for things i did wrong here, I would be very happy. Thank you and have a good day
Daniel