Part Number: TMS320F280049C
Other Parts Discussed in Thread: DRV8320
Hello,
I've searched all over the forums but can't find anything related. For some reason we are unable to sample data on ADC-C Input 1 "C1". Below is the function for setting up the ADCs. All other ADCs are working except for C1.
C1 is dedicated to sampling one of the phase voltages for a BLDC drive which incorporates a DRV8320.
Thank you in advance for any ideas!
Best,
Jonathan
void HAL_setupADCs(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *)handle;
SysCtl_delay(100U);
ADC_setVREF(obj->adcHandle[2], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
ADC_setVREF(obj->adcHandle[1], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
ADC_setVREF(obj->adcHandle[0], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
SysCtl_delay(100U);
// Configure internal reference as 1.65V*2 = 3.3V
ASysCtl_setAnalogReference1P65(ASYSCTL_VREFHIA |
ASYSCTL_VREFHIB |
ASYSCTL_VREFHIC);
// Enable internal voltage reference
ASysCtl_setAnalogReferenceInternal(ASYSCTL_VREFHIA |
ASYSCTL_VREFHIB |
ASYSCTL_VREFHIC);
// Set main clock scaling factor (50MHz max clock for the ADC module)
ADC_setPrescaler(obj->adcHandle[0], ADC_CLK_DIV_2_0);
ADC_setPrescaler(obj->adcHandle[1], ADC_CLK_DIV_2_0);
ADC_setPrescaler(obj->adcHandle[2], ADC_CLK_DIV_2_0);
// set the ADC interrupt pulse generation to end of conversion
ADC_setInterruptPulseMode(obj->adcHandle[0], ADC_PULSE_END_OF_CONV);
ADC_setInterruptPulseMode(obj->adcHandle[1], ADC_PULSE_END_OF_CONV);
ADC_setInterruptPulseMode(obj->adcHandle[2], ADC_PULSE_END_OF_CONV);
// enable the ADCs
ADC_enableConverter(obj->adcHandle[0]);
ADC_enableConverter(obj->adcHandle[1]);
ADC_enableConverter(obj->adcHandle[2]);
// set priority of SOCs
ADC_setSOCPriority(obj->adcHandle[0], ADC_PRI_ALL_HIPRI);
ADC_setSOCPriority(obj->adcHandle[1], ADC_PRI_ALL_HIPRI);
ADC_setSOCPriority(obj->adcHandle[2], ADC_PRI_ALL_HIPRI);
// delay to allow ADCs to power up
SysCtl_delay(1000U);
// RB2/B1
ADC_setInterruptSource(obj->adcHandle[1], ADC_INT_NUMBER1, ADC_SOC_NUMBER2);
// ISENA --> B2
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN2, HAL_ADC_SAMPLE_WINDOW);
// ISENB --> B4 or C8
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN8, HAL_ADC_SAMPLE_WINDOW);
// ISENC --> C0
ADC_setupSOC(obj->adcHandle[0], ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN0, HAL_ADC_SAMPLE_WINDOW);
// VSENA - A2
ADC_setupSOC(obj->adcHandle[0], ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN2, HAL_ADC_SAMPLE_WINDOW);
// VSENB - C1
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN1, HAL_ADC_SAMPLE_WINDOW);
// VSENC - C2->RC1
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN2, HAL_ADC_SAMPLE_WINDOW);
// VSENVM - B1->RB2.
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER2, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN1, HAL_ADC_SAMPLE_WINDOW);
// B3 Speed Input
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER15, ADC_TRIGGER_EPWM2_SOCA,
ADC_CH_ADCIN3, HAL_ADC_SAMPLE_WINDOW);
return;
} // end of HAL_setupADCs() function
