Hello,
To synchronize PWM 2 and 5, I have set the code below.
base 1 to base 5 means PWM 1 to 5.
void setup_PWM(uint32_t base1, uint32_t base2, uint32_t base3, uint32_t base4, uint32_t base5, uint32_t base6
,uint16_t pwm_period_ticks, uint16_t pwm_period_ticks1, uint16_t pwm_period_ticks2)
{
EPWM_setPeriodLoadMode(base1,EPWM_PERIOD_SHADOW_LOAD); //Interrupt Trigger PWM
EPWM_setTimeBasePeriod(base1,pwm_period_ticks);
EPWM_setTimeBaseCounter(base1,0);
EPWM_setPhaseShift(base1,0);
EPWM_setTimeBaseCounterMode(base1,EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(base1,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);//TBCLK=100MHz
EPWM_setPeriodLoadMode(base2,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base2,pwm_period_ticks1);
EPWM_setTimeBaseCounter(base2,0);
EPWM_setPhaseShift(base2,0);
EPWM_setTimeBaseCounterMode(base2,EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(base2,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
EPWM_setPeriodLoadMode(base3,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base3,pwm_period_ticks1);
EPWM_setTimeBaseCounter(base3,0);
EPWM_setPhaseShift(base3,0);
EPWM_setTimeBaseCounterMode(base3,EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(base3,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
EPWM_setPeriodLoadMode(base4,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base4,pwm_period_ticks1);
EPWM_setTimeBaseCounter(base4,0);
EPWM_setPhaseShift(base4,0);
EPWM_setTimeBaseCounterMode(base4,EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(base4,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
EPWM_setPeriodLoadMode(base5,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base5,pwm_period_ticks1);
EPWM_setTimeBaseCounter(base5,0);
EPWM_setPhaseShift(base5,0);
EPWM_setTimeBaseCounterMode(base5,EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(base5,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
EPWM_setPeriodLoadMode(base6,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base6,pwm_period_ticks1);
EPWM_setTimeBaseCounter(base6,0);
EPWM_setPhaseShift(base6,0);
EPWM_setTimeBaseCounterMode(base6,EPWM_COUNTER_MODE_UP_DOWN);
EPWM_setClockPrescaler(base6,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
// Counter Compare Submodule Registers
// set duty 0% initially
EPWM_setCounterCompareValue(base1,EPWM_COUNTER_COMPARE_A,0);
EPWM_setCounterCompareShadowLoadMode(base1,EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base2,EPWM_COUNTER_COMPARE_A,0);
EPWM_setCounterCompareShadowLoadMode(base2,EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base3,EPWM_COUNTER_COMPARE_A,0);
EPWM_setCounterCompareShadowLoadMode(base3,EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base4,EPWM_COUNTER_COMPARE_A,0);
EPWM_setCounterCompareShadowLoadMode(base4,EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base5,EPWM_COUNTER_COMPARE_A,0);
EPWM_setCounterCompareShadowLoadMode(base5,EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base6,EPWM_COUNTER_COMPARE_A,0);
EPWM_setCounterCompareShadowLoadMode(base6,EPWM_COUNTER_COMPARE_A,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base1,EPWM_COUNTER_COMPARE_B,0);
EPWM_setCounterCompareShadowLoadMode(base1,EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base2,EPWM_COUNTER_COMPARE_B,0); //163
EPWM_setCounterCompareShadowLoadMode(base2,EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base3,EPWM_COUNTER_COMPARE_B,0);
EPWM_setCounterCompareShadowLoadMode(base3,EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base4,EPWM_COUNTER_COMPARE_B,0);
EPWM_setCounterCompareShadowLoadMode(base4,EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base5,EPWM_COUNTER_COMPARE_B,0);
EPWM_setCounterCompareShadowLoadMode(base5,EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);
EPWM_setCounterCompareValue(base6,EPWM_COUNTER_COMPARE_B,0);
EPWM_setCounterCompareShadowLoadMode(base6,EPWM_COUNTER_COMPARE_B,EPWM_COMP_LOAD_ON_CNTR_ZERO);
// Action Qualifier SubModule Registers
// to start don't configure the PWM to do anything
HWREGH(base1 + EPWM_O_AQCTLA) =0 ;
HWREGH(base1 + EPWM_O_AQCTLB) =0 ;
HWREGH(base2 + EPWM_O_AQCTLA) =0 ;
HWREGH(base2 + EPWM_O_AQCTLB) =0 ;
HWREGH(base3 + EPWM_O_AQCTLA) =0 ;
HWREGH(base3 + EPWM_O_AQCTLB) =0 ;
HWREGH(base4 + EPWM_O_AQCTLA) =0 ;
HWREGH(base4 + EPWM_O_AQCTLB) =0 ;
HWREGH(base5 + EPWM_O_AQCTLA) =0 ;
HWREGH(base5 + EPWM_O_AQCTLB) =0 ;
HWREGH(base6 + EPWM_O_AQCTLA) =0 ;
HWREGH(base6 + EPWM_O_AQCTLB) =0 ;
//BASE2
// CTR = CMPA@UP , set to 1
EPWM_setActionQualifierAction(base1, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
EPWM_setActionQualifierAction(base1, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
// CTR = CMPA@Down , toggle
EPWM_setActionQualifierAction(base1, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
EPWM_setActionQualifierAction(base1, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
// CTR = CMPA@UP , set to 1
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
// CTR = CMPA@Down , toggle
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
// CTR = CMPA@UP , set to 1
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
// CTR = CMPA@Down , toggle
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
// CTR = CMPA@UP , set to 1
EPWM_setActionQualifierAction(base4, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
EPWM_setActionQualifierAction(base4, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
// CTR = CMPA@Down , toggle
EPWM_setActionQualifierAction(base4, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
EPWM_setActionQualifierAction(base4, EPWM_AQ_OUTPUT_B ,EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
// CTR = CMPA@UP , set to 1
EPWM_setActionQualifierAction(base5, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
EPWM_setActionQualifierAction(base5, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
EPWM_setActionQualifierAction(base5, EPWM_AQ_OUTPUT_A, EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
EPWM_setActionQualifierAction(base5, EPWM_AQ_OUTPUT_B, EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
// configure PWM 1 as master and PWM 2,4 and 5 as slaves and
// let it pass the sync in pulse from PWM1
EPWM_disablePhaseShiftLoad(base1); //EPWM
EPWM_setSyncOutPulseMode(base1,EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
EPWM_enablePhaseShiftLoad(base2);
// This basically is aso SYNCIN pass, need to correct driver lib comments
EPWM_setSyncOutPulseMode(base2,EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base2,2);//This is just to compensate the fact it takes 2 cycles to propagate the sync signal from master to slave.
EPWM_setCountModeAfterSync(base2, EPWM_COUNT_MODE_UP_AFTER_SYNC);
SysCtl_setSyncInputConfig(SYSCTL_SYNC_IN_EPWM4,SYSCTL_SYNC_IN_SRC_EPWM1SYNCOUT);
EPWM_enablePhaseShiftLoad(base4);
// This basically is aso SYNCIN pass, need to correct driver lib comments
EPWM_setSyncOutPulseMode(base4,EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base4,2);//This is just to compensate the fact it takes 2 cycles to propagate the sync signal from master to slave.
EPWM_setCountModeAfterSync(base4, EPWM_COUNT_MODE_UP_AFTER_SYNC);
EPWM_enablePhaseShiftLoad(base5);
// This basically is aso SYNCIN pass, need to correct driver lib comments
EPWM_setSyncOutPulseMode(base5,EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base5,2);//This is just to compensate the fact it takes 2 cycles to propagate the sync signal from master to slave.
EPWM_setCountModeAfterSync(base5, EPWM_COUNT_MODE_UP_AFTER_SYNC);
EPWM_setActionQualifierContSWForceShadowMode(base1,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
EPWM_setActionQualifierContSWForceShadowMode(base2,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
EPWM_setActionQualifierContSWForceShadowMode(base3,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
EPWM_setActionQualifierContSWForceShadowMode(base4,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
EPWM_setActionQualifierContSWForceShadowMode(base5,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
}
However, I found the malfunction of the Soft Start code operating according to the below code.
void SoftStart(void)
{
LLC_Switching_Period = LLC_Switching_Period + 0.0005;
dutyPU = dutyPU + 0.0001;
if(dutyPU > 0.3)
{
dutyPU = 0.3;
}
if(LLC_Switching_Period > 500)
{
LLC_Switching_Period = 500;
}
if((LLC_Switching_Period == 500) && (dutyPU == 0.3))
{
LLC_Switching_Period = 500;
dutyPU = 0.3;
SoftStart_flag = 1;
}
}
LLC_Switching_Periode (PWM2) is a TBPRD control variable configured to gradually decrease the converter's switching frequency from 150 kHz to 100 kHz.
Also, dutyPU (PWM5) is a variable for gradually increasing the converter's duty ratio.
The operation depends on the presence or absence of the PWM synchronization code below.
EPWM_disablePhaseShiftLoad(base1); //EPWM
EPWM_setSyncOutPulseMode(base1,EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
EPWM_enablePhaseShiftLoad(base2);
// This basically is aso SYNCIN pass, need to correct driver lib comments
EPWM_setSyncOutPulseMode(base2,EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base2,2);//This is just to compensate the fact it takes 2 cycles to propagate the sync signal from master to slave.
EPWM_setCountModeAfterSync(base2, EPWM_COUNT_MODE_UP_AFTER_SYNC);
SysCtl_setSyncInputConfig(SYSCTL_SYNC_IN_EPWM4,SYSCTL_SYNC_IN_SRC_EPWM1SYNCOUT);
EPWM_enablePhaseShiftLoad(base4);
// This basically is aso SYNCIN pass, need to correct driver lib comments
EPWM_setSyncOutPulseMode(base4,EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base4,2);//This is just to compensate the fact it takes 2 cycles to propagate the sync signal from master to slave.
EPWM_setCountModeAfterSync(base4, EPWM_COUNT_MODE_UP_AFTER_SYNC);
EPWM_enablePhaseShiftLoad(base5);
// This basically is aso SYNCIN pass, need to correct driver lib comments
EPWM_setSyncOutPulseMode(base5,EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base5,2);//This is just to compensate the fact it takes 2 cycles to propagate the sync signal from master to slave.
EPWM_setCountModeAfterSync(base5, EPWM_COUNT_MODE_UP_AFTER_SYNC);
If there is no synchronization code, synchronization is impossible, but there is no big problem in gradually decreasing or increasing the switching frequency and duty.
However, if there is a synchronization code, there is no problem with gradually decreasing the switching frequency, but there is a problem in the case of the duty ratio.
The duty ratio is gradually increased from 0.1 to 0.3, but when there is a synchronization code, the dutyPU variable is reflected in the real PWM signal at about 0.2.
Therefore, there is a section in which the duty ratio suddenly increases, which causes a problem in the converter operation.
Could you help me how to solve those kinds of issues in PWM?
Thank you.
