Hi team:
Customer's design: When the program reads I2C slave device data, it must first send the slave device address. In addition, the controlled I2C peripheral also needs a 3-byte control word, the code is as follows:
// Temp variables
uint8_t val;
unsigned long r = 0;
// Construct the 24 bit control word
char control_word[3] = {0x90, 0x00, addr&0xFF};
I2C_setSlaveAddress(I2CA_BASE, SLAVE_ADDRESS);
//I2C_setDataCount(I2CA_BASE, 0);
I2C_setConfig(I2CA_BASE, I2C_MASTER_SEND_MODE|I2C_REPEAT_MODE);
I2C_sendStartCondition(I2CA_BASE);
while( I2C_getStatus(I2CA_BASE) & I2C_STS_NO_ACK );
DEVICE_DELAY_US(100);
/* Send bits CW23-CW16 of the control word */
I2C_putData(I2CA_BASE, control_word[0]);
while( I2C_getStatus(I2CA_BASE) & I2C_STS_NO_ACK );
DEVICE_DELAY_US(100);
/* Send bits CW15-CW8 of the control word */
I2C_putData(I2CA_BASE, control_word[1]);
while( I2C_getStatus(I2CA_BASE) & I2C_STS_NO_ACK );
DEVICE_DELAY_US(100);
/* Send bits CW7-CW0 of the control word */
I2C_putData(I2CA_BASE, control_word[2]);
while( I2C_getStatus(I2CA_BASE) & I2C_STS_NO_ACK );
DEVICE_DELAY_US(100);
At this point, the first part of the operation of reading the slave device is completed: the device address and 3 control bits are sent.
Next, the customer needs to set the IIC to MasterRecieve mode to receive slave data. Need to receive 4 bytes of slave data, but the customer has not figured out how to add a 100uS delay between the received bytes.
Taking MasterSend as an example, in this mode, when the data to be sent is written into DXR, SCL will generate a corresponding number of clocks to complete every 8-bit transmission and 1-bit slave ACK detection, resulting in a total of 9 SCL clocks.
However, if it is MasterRecieve mode, how to deal with it? The code currently written by the customer is as follows:
I2C_setSlaveAddress(I2CA_BASE, SLAVE_ADDRESS);
I2C_setDataCount(I2CA_BASE, 4);
I2C_setConfig(I2CA_BASE, I2C_MASTER_RECEIVE_MODE);
I2C_sendStopCondition(I2CA_BASE);
I2C_sendStartCondition(I2CA_BASE);
while( !(I2C_getStatus(I2CA_BASE) & I2C_STS_REG_ACCESS_RDY) );
DEVICE_DELAY_US(100); --> Set the STT bit, and determine whether the device address has been sent by detecting the ARDY detection. Is it possible to use the ARDY detection? Then there is, is the 100uS delay introduced in this part effective? Can there be a delay between the device address and the first received byte?
while( !(I2C_getStatus(I2CA_BASE) & I2C_STS_RX_DATA_RDY) );
val = I2C_getData(I2CA_BASE);
r |= val;
DEVICE_DELAY_US(100); -->Detect whether data is received through RXDY, and introduce a 100uS delay after processing, and the processing between subsequent bytes is similar. Can this process cause a 100uS delay between received bytes?
while( !(I2C_getStatus(I2CA_BASE) & I2C_STS_RX_DATA_RDY) );
val = I2C_getData(I2CA_BASE);
r |= ((unsigned long)val)<<8;
DEVICE_DELAY_US(100);
while( !(I2C_getStatus(I2CA_BASE) & I2C_STS_RX_DATA_RDY) );
val = I2C_getData(I2CA_BASE);
r |= ((unsigned long)val)<<16;
DEVICE_DELAY_US(100);
while( !(I2C_getStatus(I2CA_BASE) & I2C_STS_RX_DATA_RDY) );
val = I2C_getData(I2CA_BASE);
r |= ((unsigned long)val)<<24;
*result = r;
DEVICE_DELAY_US(100);
while(I2C_getStopConditionStatus(I2CA_BASE));
Best regards
