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TIDM-1000: Minimum load?

Jeff Colter
Prodigy 80 points

Part Number: TIDM-1000

We implemented the Vienna code in our own hardware design and it works well but the controller loses control of the output voltage below 300W.

Design specs:

Fsw = 140 kHz

Design load = 8 kW

DC output = 400 VDC

AC input = 208 VAC

There is no mention of minimum load in the user guide.

We noticed that vienna_Gv_out goes negative right at the minimum load point.

We tried to implement a bang-bang wrapper wherein we shut off PWM when DC output exceeds 415 V and re-enable at 385 V but it appears to latch off when Vout exceeds 415.

We initially scaled the voltage and current through the GUI and as far as I know, offsets are not automatically zeroed out (this is another task - figure out how and when auto calibration of voltage and current sensing happens).

Question 1) What is the cause of regulation loss below 300 W?

Also, when we implemented build mode 4, the DC balance controller did not perform well - it was unstable.  When I lowered the switching frequency down to about 80 kHz in steps, it got progressively better.

Question 2) What is the likely cause?  Not enough time to perform the balance algorithm?  Is the CLA required at this switching frequency?

So far we are able to keep the buses balanced with only a few watts worth of load resistors, so the balance loop may not be necessary.

  • 0
    Prodigy 80 points

    We modified the Gv value to prevent it's value from going negative.  When it does the PI loop crashes.

    Now we can operate to zero load, but it appears the PI loop has a bug.

    Can anyone comment on this?

  • 0 in reply to Jeff Colter
    TI__Genius 15935 points

    Hi Jeff,

    Sorry for the late reply. There is no light load limitation in the original reference design. 

    It makes sense for me to limit the voltage loop output in the PI loop either through the intermediate value or output value limiting.

    Which bug are your referring?

    Regards,

    Chen 

  • 0
    Prodigy 10 points

    Hi Chen, 

    I will answer your question for Jeff, he is out for vacation

    The outer voltage regulation is going through DCL_PI_C4.asm file. This PI regulator has min and max limits and when the output of the regulator (VIENNA_GV_PI_MIN ) hits the minimum value, the output voltage of the Vienna Rectifier winds up and the regulation crashes. The output voltage keeps increasing until it hits the output voltage limit and shuts down the PWMs.  

    For now, we just decreased the Voltage loop minimum value significantly (VIENNA_GV_PI_MIN) to be able to run the rectifier in no load conditions but eventually we would like to limit the current. Do you have any comment on this?