Part Number: TMS320F280025C
Other Parts Discussed in Thread: C2000WARE
Hi,
I try to implement a bootloader, which should support DFU over SCI. I'm using the following example to transfer the data over SCI and write the application to flash:
C2000Ware_4_00_00_00\driverlib\f28002x\examples\flash\flash_kernel_ex3_sci_flash_kernel
As far as I understood this is, that the application waits for an SCI connection and a specific command and will perform a DFU and boot the app. When I want to directly jump to the app without
a DFU, i can then just prevent the call to "EntryAddr = sciGetFunction(SCI_BOOT_ALT1);"
Main Function of flash_kernel_ex3_sci_flash_kernel :
uint32_t main(void)
{
//
// flush SCIA TX port by waiting while it is busy, driverlib.
//
// sciaFlush();
//
// Step 1. Initialize System Control:
// Enable Peripheral Clocks
//
Device_init();
//
// Step 2. Initialize GPIO:
//
Device_initGPIO();
//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;
//
// init interrupt and vectorTable, driverlib.
//
Interrupt_initModule();
Interrupt_initVectorTable();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, 4);
initFlashSectors();
uint32_t EntryAddr;
//
// parameter SCI_BOOT for GPIO28,29
// refer to cpu1bootrom.h for alternate SCI Boot Pin configurations
//
EntryAddr = sciGetFunction(SCI_BOOT_ALT1);
return(EntryAddr);
}
Now there is the serial_flash_programmer provided from TI at C2000Ware_4_00_00_00\utilities\flash_programmers\serial_flash_programmer and it seems, it also wants to send always the bootloader first.
Can I somehow prevent the flasher tool to first send the bootloader and just directly send the application? When I do not use the command "-k bootloader_hex.txt" i get a runtime error of the serial_flash_programmer.exe. The source code for the serial_flash_programmer is given, but I would like to prevent rebuilding it my own.
Application Linker File:
-stack 0x380
MEMORY
{
BEGIN : origin = 0x080000, length = 0x000002
BOOT_RSVD : origin = 0x00000002, length = 0x00000126
RAMM0 : origin = 0x00000128, length = 0x000002D8
RAMM1 : origin = 0x00000400, length = 0x000003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
/* RAMLS4 : origin = 0x0000A000, length = 0x00000800
RAMLS5 : origin = 0x0000A800, length = 0x00000800
RAMLS6 : origin = 0x0000B000, length = 0x00000800
RAMLS7 : origin = 0x0000B800, length = 0x00000800*/
/* Combining all the LS RAMs */
RAMLS4567 : origin = 0x0000A000, length = 0x00002000
RAMGS0 : origin = 0x0000C000, length = 0x000007F8
// RAMGS0_RSVD : origin = 0x0000C7F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
BOOTROM : origin = 0x003F0000, length = 0x00008000
BOOTROM_EXT : origin = 0x003F8000, length = 0x00007FC0
/*RESET : origin = 0x003FFFC0, length = 0x00000002*/
RESET : origin = 0x003FFFC0, length = 0x00000002
/* Flash sectors */
/* BANK 0 */
FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x000FF0 /* on-chip Flash */
// FLASH_BANK0_SEC15_RSVD : origin = 0x08FFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
}
SECTIONS
{
.reset : > RESET, TYPE = DSECT /* not used, */
codestart : > BEGIN, ALIGN(8) /*Necessary, otherwise it will not restart */
.text : >> FLASH_BANK0_SEC4, ALIGN(8)
.cinit : > FLASH_BANK0_SEC5, ALIGN(8)
.switch : > FLASH_BANK0_SEC5, ALIGN(8)
.stack : > RAMM1
.init_array : > FLASH_BANK0_SEC5, ALIGN(8)
.bss : > RAMLS4567
.bss:output : > RAMLS4567
.bss:cio : > RAMGS0
.const : > FLASH_BANK0_SEC5, ALIGN(8)
.data : > RAMLS4567
.sysmem : > RAMLS4567
ramgs0 : > RAMGS0
GROUP
{
.TI.ramfunc
{ -l FlashAPI_F28002x_FPU32.lib}
}LOAD = FLASH_BANK0_SEC5,
RUN = RAMLS4567,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
DataBufferSection : > RAMGS0, ALIGN(8)
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
/*
//===========================================================================
// End of file.
//===========================================================================
*/
Bootloader Linker File:
MEMORY
{
BEGIN : origin = 0x000000, length = 0x000002
BOOT_RSVD : origin = 0x00000002, length = 0x00000126
RAMM0 : origin = 0x00000128, length = 0x000002D8
RAMM1 : origin = 0x00000400, length = 0x000003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
/* RAMLS4 : origin = 0x0000A000, length = 0x00000800
RAMLS5 : origin = 0x0000A800, length = 0x00000800
RAMLS6 : origin = 0x0000B000, length = 0x00000800
RAMLS7 : origin = 0x0000B800, length = 0x00000800 */
/* Combining all the LS RAMs */
RAMLS4567 : origin = 0x0000A000, length = 0x00002000
RAMGS0 : origin = 0x0000C000, length = 0x000007F8
// RAMGS0_RSVD : origin = 0x0000C7F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RESET : origin = 0x003FFFC0, length = 0x00000002
// FLASHBANK1 : origin = 0x00080000, length = 0x00010000
/* Flash sectors */
/* BANK 0 */
FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE
FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000
FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000
FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000
FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000
FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000
FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000
FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000
FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000
FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000
FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000
FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000
FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000
FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000
FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000
FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x000FF8
// FLASH_BANK0_SEC15_RSVD : origin = 0x08FFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
BOOTROM : origin = 0x003F0000, length = 0x00008000
BOOTROM_EXT : origin = 0x003F8000, length = 0x00007FC0
}
SECTIONS
{
.text : > RAMLS4567 | RAMGS0
.TI.ramfunc : > RAMM0
.cinit : > RAMM0
.switch : > RAMM0
.reset : > RESET, TYPE = DSECT /* not used, */
.cio : > RAMGS0
codestart : > BEGIN
.stack : > RAMM1
#if defined(__TI_EABI__)
.bss : > RAMLS4567
.bss:output : > RAMLS4567
.init_array : > RAMM0
.const : > RAMGS0
.data : > RAMLS4567 | RAMGS0
.sysmem : > RAMLS4567
#else
.pinit : > RAMM0
.ebss : > RAMLS4567
.econst : > RAMGS0
.esysmem : > RAMLS4567
#endif
ramgs0 : > RAMGS0
/* Allocate IQ math areas: */
IQmath : > RAMLS4567 | RAMGS0
IQmathTables : > RAMLS4567 | RAMGS0
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
Edit:
I could start now the bootloader in the flash, but when I write over SCI to it, I get now CRC errors. So somehow there is a problem, because some functions are not running into the RAM. What do I need to load into the RAM for this bootloader example?
Flash Bootloader Linker File:
-stack 0x380
MEMORY
{
BEGIN : origin = 0x080000, length = 0x000002
BOOT_RSVD : origin = 0x00000002, length = 0x00000126
RAMM0 : origin = 0x00000128, length = 0x000002D8
RAMM1 : origin = 0x00000400, length = 0x000003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
/* RAMLS4 : origin = 0x0000A000, length = 0x00000800
RAMLS5 : origin = 0x0000A800, length = 0x00000800
RAMLS6 : origin = 0x0000B000, length = 0x00000800
RAMLS7 : origin = 0x0000B800, length = 0x00000800*/
/* Combining all the LS RAMs */
RAMLS4567 : origin = 0x0000A000, length = 0x00002000
RAMGS0 : origin = 0x0000C000, length = 0x000007F8
// RAMGS0_RSVD : origin = 0x0000C7F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
BOOTROM : origin = 0x003F0000, length = 0x00008000
BOOTROM_EXT : origin = 0x003F8000, length = 0x00007FC0
/*RESET : origin = 0x003FFFC0, length = 0x00000002*/
RESET : origin = 0x003FFFC0, length = 0x00000002
/* Flash sectors */
/* BANK 0 */
FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x000FF0 /* on-chip Flash */
// FLASH_BANK0_SEC15_RSVD : origin = 0x08FFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
}
SECTIONS
{
.reset : > RESET, TYPE = DSECT /* not used, */
codestart : > BEGIN, ALIGN(8) /*Necessary, otherwise it will not restart */
.text : >> FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2, ALIGN(8)
.cinit : > FLASH_BANK0_SEC3, ALIGN(8)
.switch : > FLASH_BANK0_SEC3, ALIGN(8)
.stack : > RAMM1
.init_array : > FLASH_BANK0_SEC3, ALIGN(8)
.bss : > RAMLS4567
.bss:output : > RAMLS4567
.bss:cio : > RAMGS0
.const : > FLASH_BANK0_SEC3, ALIGN(8)
.data : > RAMLS4567
.sysmem : > RAMLS4567
ramgs0 : > RAMGS0
GROUP
{
.TI.ramfunc
{ -l FlashAPI_F28002x_FPU32.lib}
}LOAD = FLASH_BANK0_SEC3,
RUN = RAMLS4567,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
/* Allocate IQ math areas: */
IQmath : > RAMLS4567 | RAMGS0
IQmathTables : > RAMLS4567 | RAMGS0
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
