TMS320F28035: F28035 GPIO status during power off condition

Aki,

If you hold I2C module in reset (I2CMDR.IRS = 0), SCL and SDA pins are in high-impedance state not when the whole device is powered off. Why do you expect IO pins be in high impedance when the device is powered off? Are the pull-up resistors still powered on? 

Regards,

Manoj

Hi Manoj,

Thank you for the feedback. The issue was found during the device was powered off, and we did not understand why SCL and SDA was pulled low by the device. If the IO pins(GPIO32 and GPIO33) are high impedance during the powered off status, the issue will not occur, right? 

Manoj Santha Mohan said:

Are the pull-up resistors still powered on? 

The 3.3V which the pull-up resistors connected to,  was the VDDIO for the device, and also removed during the off status.

If VDDIO is powered off the pull-up resistors will not longer work and SDA / SCL lines will pull low. If VDDIO is powered off, what will make SCL and SDA stay high?

Hi Manoj, 

The issue specially referred to the below applications, where there are multiple products(server PSU) connected to the same SDA/SCL bus. If one of the PSUs is powered off, why was the SDA/SCL bus pulled low by that PSU?

Aki Li said:

several PSUs were connected to the same PMBUS bus.

You can't powerdown VDDIO and expect the SCL / SDA lines to stay high as these line are connected to VDDIO using pull-up resistors.

Hi Manoj,

The SCL/SCA lines were also connected to 3.3V in other server PSUs, which were still powered on. 

Now, I understand the problem better. But, unfortunately, I don't have an answer yet and I need to check with design team and get back with you.

Please expect to hear back from me in 10  - 15 business days.

Regards,

Manoj

I was unable to reproduce this problem on bench. It is highly likely that the issue is in customer board setup.