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TMS320F28335: XINTF Parallel Boot data stream transfer method

Part Number: TMS320F28335

Hi team,

Here's an issue from the customer may need your help:

As per the section of 2.2.19 of TMS320x2833x, TMS320x2823x Technical Reference Manual, the flow for host to send a data stream is as follows: 

The host will stream data to the XINTF's data bus XD[15:0] for DSP reading. 

1) In implementing the above process, since the DSP reads data from address 0x10_0000 of zone6 only when XINTF_Parallel_Boot, so in host, the data stream needs to be placed at host address 0x10_0000, where the DSP accesses host's zone6 via XINTF. Download the data stream to enable boot.

However, when implemented, it is discovered that host writes data to address 0x10_0000, the XINTF must be enabled, and the DSP's XINTF is always enabled during the XINTF_Parallel_Boot process.

Both host and DSP have XINTF enabled. And also accessing zone6 of host at the same time, there will be contention and both host and DSP access errors will occur.

Right? If so, how to resolve XINTF competition? If not, what is the correct way to implement it?

2) Regarding "The Load XD[15:0] with data report" in the figure above, the customer tries to implement it in a similar way to the Parallel_Boot function (GPIO) in section 2.2.18. That is, the host does not enable XINTF, and the XD[15:0] is configured as a general-purpose IO to send data by controlling the high level of the corresponding GPIO.

However, it failed, and the data received by the DSP was still read from address 0x10_0000 of host.

How does host send data to DSP XINTF_Parallel_Boot for reading? 

Could you help check this case? Thanks.

Best Regards,

Cherry

  • Cherry,

    Today is US holiday, I'll reply back tomm when I'm in the office.

    Best,

    Matthew

  • Hi Matthew,

    Noted and just a quick update:

    Customer viewed the signal with an oscilloscope and found that the reason for the access error might be that both XINTF enabled at the same time caused an output conflict.

    When XINTF is enabled by both DSP and host, both the chip select XZCS6 and read enable XRD are pulled low when either side performs a read operation, but the output of the other side is high and the output of both devices is conflicting. This causes signal fluctuations to generate large glitches, rendering reads ineffective.

    The same problem exists for address lines XD[0:19].

    Thanks and regards,

    Cherry

  • The host will stream data to the XINTF's data bus XD[15:0] for DSP reading. 

    Correct.

    it is discovered that host writes data to address 0x10_0000,

    The host does not write. The DSP reads. Very important to understand this crucial difference.

    Both host and DSP have XINTF enabled.

    I don't understand what you mean by this. XINTF is a peripheral that is inside the DSP. Only the DSP can enable the XINTF.  The host is just mapped at the address 0x10 0000 of the DSP's memory space. 

    And also accessing zone6 of host at the same time,

    It is meaningless to say "zone6 of host". Zone 6 is with respect to the DSP. The host does not know what "zone 6" is.

    there will be contention and both host and DSP access errors will occur.

    Not sure how a contention can occur. Contention occurs only when two entities compete for the same resource. In this case, the DSP only reads from the host by presenting an address of 0x10 0000. The host places the data on the data bus for the DSP to read. Direction of data-flow is always from the host to the DSP. How can a contention occur?

    If so, how to resolve XINTF competition? I

    As explained before, there is never a "competition".

    the host does not enable XINTF,

    The host cannot "enable XINTF". XINTF is a DSP peripheral and only the DSP can enable XINTF, not the host.

    and the XD[15:0] is configured as a general-purpose IO

    No, for this mode, XD[15:0] cannot be configured as GPIO. It should only be configured as XD[15:0] since these pins are now part of XINTF.

    How does host send data to DSP XINTF_Parallel_Boot for reading? 

    This is clearly explained in 2.2.19 XINTF_Parallel_Boot Function of www.ti.com/lit/SPRUI07. Please read text above and below Figure 2-24.

  • found that the reason for the access error might be that both XINTF enabled at the same time caused an output conflict.

    The direction of data flow is from the host to the DSP. Can you clarify what device is the host? You can share the schematics with me privately.

    when either side performs a read operation,

    Both sides don't read. Only the DSP reads.