Part Number: TMS320F28069
I need to write program for variable frequency for 120 deg mode of operation to generte pulses to inverter. i am attaching the code facing prob with 2nd pulse generation.
#include "DSP28x_Project.h"
#include "float.h"
////////////////////////////////////////////////////////////////////
typedef struct
{
volatile struct EPWM_REGS *EPwmRegHandle;
Uint16 EPwm_CMPA_Direction;
Uint16 EPwm_TBPRD_Direction;
Uint16 EPwmTimerIntCount;
Uint16 EPwmMaxCMPA;
Uint16 EPwmMinCMPA;
Uint16 EPwmMAXTBPRD;
Uint16 EPwmMinTBPRD;
} EPWM_INFO;
///////////////////////////////////////////////////////////////
void InitEPwm1Example(void);
void InitEPwm2Example(void);
//void InitEPwm3Example(void);
//void InitEPwm4Example(void);
///////////////////////////////////////////////////////////////
__interrupt void epwm1_isr(void);
__interrupt void epwm2_isr(void);
// __interrupt void epwm3_isr(void);
//////////////////////////////////////
void update_compare1(EPWM_INFO*);
EPWM_INFO epwm1_info;
void update_compare2(EPWM_INFO*);
EPWM_INFO epwm2_info;
//void update_compare3(EPWM_INFO*);
// EPWM_INFO epwm3_info;
///////////////////////////////////////////////////////////////
#define EPWM_TIMER_TBPRD_MAX 5022
#define EPWM_TIMER_TBPRD_Min 1004
#define EPWM_CMP_UP 1
#define EPWM_CMP_DOWN 0
/////////////////////////////////////////////////////////////
void main(void)
{
InitSysCtrl();
InitEPwm1Gpio();
InitEPwm2Gpio();
//InitEPwm3Gpio();
//InitEPwm4Gpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW;
PieVectTable.EPWM1_INT = &epwm1_isr;
PieVectTable.EPWM2_INT = &epwm2_isr;
//PieVectTable.EPWM3_INT = &epwm3_isr;
//PieVectTable.EPWM4_INT = &epwm4_isr;
EDIS;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
InitEPwm1Example();
InitEPwm2Example();
//InitEPwm3Example();
//InitEPwm4Example();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
//PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
//PieCtrlRegs.PIEIER3.bit.INTx4 = 1;
EINT;
ERTM;
for(;;)
{
__asm(" NOP"); }
}
//////////////////////////////////////////////////////////////////
__interrupt void
epwm1_isr(void)
{
update_compare1(&epwm1_info);
EPwm1Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
///////////////////////////////////
__interrupt void
epwm2_isr(void)
{
update_compare2(&epwm2_info);
EPwm2Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
////////////////////////////////////////////////////////////////
/* __interrupt void
epwm3_isr(void)
{
update_compare(&epwm3_info);
EPwm3Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
////////////////////////////////////////////////////////////////
__interrupt void
epwm4_isr(void)
{
update_compare(&epwm4_info);
EPwm4Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3; }*/
//////////////////////////////////////////////////////////////// EPWM 1
void
InitEPwm1Example()
{
EPwm1Regs.TBPRD = EPWM_TIMER_TBPRD_MAX;
EPwm1Regs.TBPHS.half.TBPHS = 0x0000;
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.CMPA.half.CMPA = EPWM_TIMER_TBPRD_MAX/2;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV14H;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV128C;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CAU = AQ_SET;
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;
//epwm1_info.EPwm_CMPA_Direction = EPWM_CMP_DOWN;
//epwm1_info.EPwm_TBPRD_Direction = EPWM_CMP_DOWN;
epwm1_info.EPwmTimerIntCount = 0;
epwm1_info.EPwmRegHandle = &EPwm1Regs;
epwm1_info.EPwmMaxCMPA = EPWM_TIMER_TBPRD_MAX/2;
epwm1_info.EPwmMinCMPA = EPWM_TIMER_TBPRD_Min/2;
epwm1_info.EPwmMAXTBPRD = EPWM_TIMER_TBPRD_MAX;
epwm1_info.EPwmMinTBPRD= EPWM_TIMER_TBPRD_Min; }
//////////////////////////////////////////////////////////////////// EPWM 2
void
InitEPwm2Example()
{
EPwm2Regs.TBPRD = EPWM_TIMER_TBPRD_MAX;
EPwm2Regs.TBPHS.half.TBPHS = 0x0000;
EPwm2Regs.TBCTR = 0x0000;
EPwm2Regs.CMPA.half.CMPA = EPWM_TIMER_TBPRD_MAX*2/3;
EPwm2Regs.CMPB= EPWM_TIMER_TBPRD_MAX*5/6;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV14H;
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV128C;
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm2Regs.AQCTLA.bit.CBU = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
EPwm2Regs.ETSEL.bit.INTEN = 1;
EPwm2Regs.ETPS.bit.INTPRD = ET_1ST;
//epwm2_info.EPwm_CMPA_Direction = EPWM_CMP_DOWN;
//epwm2_info.EPwm_TBPRD_Direction = EPWM_CMP_DOWN;
epwm2_info.EPwmTimerIntCount = 0;
epwm2_info.EPwmRegHandle = &EPwm2Regs;
epwm2_info.EPwmMaxCMPA = EPWM_TIMER_TBPRD_MAX*2/3;
epwm2_info.EPwmMinCMPA = EPWM_TIMER_TBPRD_Min*2/3;
epwm2_info.EPwmMAXTBPRD = EPWM_TIMER_TBPRD_MAX*5/6;
epwm2_info.EPwmMinTBPRD= EPWM_TIMER_TBPRD_Min*5/6; }
/////////////////////////////////////////////////////////// EPWM 3
/* void
InitEPwm3Example()
{
EPwm3Regs.TBPRD = EPWM_TIMER_TBPRD_MAX;
EPwm3Regs.TBPHS.half.TBPHS = 0x0000;
EPwm3Regs.TBCTR = 0x0000;
EPwm3Regs.CMPA.half.CMPA = EPWM_TIMER_TBPRD_MAX/2;
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV14H;
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV128C;
EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm3Regs.AQCTLA.bit.PRD= AQ_SET;
EPwm3Regs.AQCTLA.bit.CAD= AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.PRD= AQ_SET;
EPwm3Regs.AQCTLB.bit.CAD= AQ_CLEAR;
EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
EPwm3Regs.ETSEL.bit.INTEN = 1;
EPwm3Regs.ETPS.bit.INTPRD = ET_1ST;
epwm3_info.EPwm_CMPA_Direction = EPWM_CMP_DOWN;
epwm3_info.EPwm_TBPRD_Direction = EPWM_CMP_DOWN;
epwm3_info.EPwmTimerIntCount = 0;
epwm3_info.EPwmRegHandle = &EPwm3Regs;
epwm3_info.EPwmMaxCMPA = EPWM_TIMER_TBPRD_MAX/2;
epwm3_info.EPwmMinCMPA = EPWM_TIMER_TBPRD_Min/2;
epwm3_info.EPwmMAXTBPRD = EPWM_TIMER_TBPRD_MAX;
epwm3_info.EPwmMinTBPRD= EPWM_TIMER_TBPRD_Min; }
/////////////////////////////////////////////////////////////////// EPWM 4
void
InitEPwm4Example()
{
EPwm4Regs.TBPRD = EPWM_TIMER_TBPRD_MAX;
EPwm4Regs.TBPHS.half.TBPHS = 0x0000;
EPwm4Regs.TBCTR = 0x0000;
EPwm4Regs.CMPA.half.CMPA = EPWM_TIMER_TBPRD_MAX/2;
EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV14H;
EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV128C;
EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm4Regs.AQCTLA.bit.CAD= AQ_SET;
EPwm4Regs.AQCTLA.bit.ZRO= AQ_CLEAR;
EPwm4Regs.AQCTLB.bit.CAD= AQ_SET;
EPwm4Regs.AQCTLB.bit.ZRO= AQ_CLEAR;
EPwm4Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;
EPwm4Regs.ETSEL.bit.INTEN = 1;
EPwm4Regs.ETPS.bit.INTPRD = ET_1ST;
epwm4_info.EPwm_CMPA_Direction = EPWM_CMP_DOWN;
epwm4_info.EPwm_TBPRD_Direction = EPWM_CMP_DOWN;
epwm4_info.EPwmTimerIntCount = 0;
epwm4_info.EPwmRegHandle = &EPwm4Regs;
epwm4_info.EPwmMaxCMPA = EPWM_TIMER_TBPRD_MAX/2;
epwm4_info.EPwmMinCMPA = EPWM_TIMER_TBPRD_Min/2;
epwm4_info.EPwmMAXTBPRD = EPWM_TIMER_TBPRD_MAX;
epwm4_info.EPwmMinTBPRD= EPWM_TIMER_TBPRD_Min; }*/
//////////////////////////////////////////////////////////////////////////////// Condition
/*void
update_compare(EPWM_INFO *epwm_info)
{
if(epwm_info->EPwmTimerIntCount == 5)
{
epwm_info->EPwmTimerIntCount = 0;
{
if(epwm_info->EPwmRegHandle->TBPRD> epwm_info->EPwmMinTBPRD)
{
epwm_info->EPwmRegHandle->TBPRD--;
epwm_info->EPwmRegHandle->CMPA.half.CMPA=
(epwm_info->EPwmRegHandle->TBPRD--)/2;
}
else
{
epwm_info->EPwmRegHandle->TBPRD= epwm_info->EPwmMinTBPRD;
epwm_info->EPwmRegHandle->CMPA.half.CMPA=(epwm_info->EPwmMinTBPRD)/2;
}
}
}
else
{
epwm_info->EPwmTimerIntCount++;
}
return;
}
*/
void
update_compare1(EPWM_INFO *epwm1_info)
{
if(epwm1_info->EPwmTimerIntCount == 1)
{
if(epwm1_info->EPwmRegHandle->TBPRD> epwm1_info->EPwmMinTBPRD)
{
epwm1_info->EPwmRegHandle->TBPRD--;
epwm1_info->EPwmRegHandle->CMPA.half.CMPA=
(epwm1_info->EPwmRegHandle->TBPRD--)/2;
}
else
{
epwm1_info->EPwmRegHandle->TBPRD= epwm1_info->EPwmMinTBPRD;
epwm1_info->EPwmRegHandle->CMPA.half.CMPA=(epwm1_info->EPwmMinTBPRD)/2;
}
epwm1_info->EPwmTimerIntCount = 0;
}
else
{
epwm1_info->EPwmTimerIntCount++;
}
return;
}
void
update_compare2(EPWM_INFO *epwm2_info)
{
if(epwm2_info->EPwmTimerIntCount == 1)
{
if(epwm2_info->EPwmRegHandle->TBPRD> epwm2_info->EPwmMinTBPRD)
{
epwm2_info->EPwmRegHandle->TBPRD--;
epwm2_info->EPwmRegHandle->CMPA.half.CMPA=
epwm2_info->EPwmRegHandle->TBPRD--*2/3;
epwm2_info->EPwmRegHandle->CMPB=
epwm2_info->EPwmRegHandle->TBPRD--*5/6;
}
else
{
epwm2_info->EPwmRegHandle->TBPRD = epwm2_info->EPwmMinTBPRD;
epwm2_info->EPwmRegHandle->CMPA.half.CMPA = epwm2_info->EPwmMinTBPRD;
epwm2_info->EPwmRegHandle->CMPB = epwm2_info->EPwmMinTBPRD;
}
epwm2_info->EPwmTimerIntCount = 0;
}
else
{
epwm2_info->EPwmTimerIntCount++;
}
return;
}