ePWM Delay

First of all when is the delay from?  From when you write to the GPIO and the GPIO going high or between the zero event and the GPIO high?  What is your clock rate?

If the delay is between the zero event and GPIO high then this is likely just a processing delay:

When the event occurs an ISR is called.  Entering this ISR takes about 20 cycles (~130ns at 150MHz) and even more if C needs to save any variables.  There is at least half (if not all if C saves a few variables) of your delay even before you reach user code.  Then there is the time processing all code before the GPIO.  This may not be any but I would need to see the code.

How to reduce this delay? 

1) You have to do as little as possible in the ISR to ensure that no extra variables need to be saved.

2) GPIO code first thing.

3) Or write the ISR in assembler to use only variables automatically saved by the CPU.

Tim

1) The delay is from zero event or external INT (rising edge) and the GPIO high.

2) Clock rate is 150MHz.

3)Program running from RAM.

4) Program test for external INT and the GPIO high.

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#include "DSP28x_Project.h"   

interrupt void interrupt inputISR(void);


void main(void)
{

   InitSysCtrl();
  InitEPwm1Gpio();

 
      EALLOW;
      
       GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 0;
       GpioCtrlRegs.GPADIR.bit.GPIO23 = 0;
     GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 23;
      
        
      GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 0;   //
       GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0;   //
      GpioCtrlRegs.GPADIR.bit.GPIO8 = 1;   //
     
     
      GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0;   //
       GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;   //
      GpioCtrlRegs.GPADIR.bit.GPIO9 = 1;   //
        
     EDIS;
     
      XIntruptRegs.XINT1CR.bit.ENABLE = 1;
     XIntruptRegs.XINT1CR.bit.POLARITY = 1;   //

   DINT;
  
   InitPieCtrl();
  
   IER = 0x0000;
   IFR = 0x0000;

   InitPieVectTable();

   EALLOW; 
     PieVectTable.XINT1 = inputISR;  
   EDIS;   



   EALLOW;
   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
   EDIS;

    InitEPwm1Example();

   EALLOW;
   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
   EDIS;


   IER |= M_INT1;


  PieCtrlRegs.PIEIER1.bit.INTx4 = 1;   

   EINT;  
   ERTM; 


   for(;;)
   {
       asm("NOP");
   }

}


//***************

void interrupt inputISR(void) {


    EALLOW;  
    GpioDataRegs.GPASET.bit.GPIO8 = 1;
    EDIS;
   
    EALLOW;  
   GpioDataRegs.GPACLEAR.bit.GPIO8 = 1;
    EDIS;
 PieCtrlRegs.PIEIFR1.bit.INTx4=0;
PieCtrlRegs.PIEACK.bit.ACK1 = 1; // acknowledge this interrupt
}

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Thanks

Hi Ahmad,

Additional delay might be caused by the input qualification circuitry. You should check what is the path of your GPIO signal (async, sync or sync with qualification). If is is default (power-up) configuration, than it depends on the SYSCLOKOUT frequency.

Regards, Mitja

Hi Tim, Mitja,

Thanks for your response.

I selected input qualification as Async, but it seems it does not work for GPIO input, and it is as same as Synchronize to SYSCLKOUT. The SYSCLKOUT is 150M.

Ahmad