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TMS320F280049C: eQEP

Faiz Iliyas
Prodigy 40 points
Part Number: TMS320F280049C


Hi Experts,

I have a 160 rpm; 4 pole; PMSM motor for my univesity project with 8192 encode

I am struggling to understand the timer period CAPCLK and UPEVENT and time period. I went to the example for 28004x for eqep, I dont understand

1) Why have they considered 10ms? are we free to choose any ? what is the criteria

In the example it considered 100Hz but in the cfg configuration, it is using 1000000 instead of 100.

2) How exactly and on what circumstances do I select CAPCLK and UPEVENT values?

Any

//If base RPM = 6000 rpm:
//      6000 rpm = [(x2 - x1) / 4000] / 10ms                        -Equation 2
//               = [(x2 - x1) / 4000] / (.01s * 1 min / 60 sec)
//               = [(x2 - x1) / 4000] / (1 / 6000) min
//
//      max (x2 - x1) = 4000 counts or 1 revolution in 10 ms
//
// If both sides of Equation 2 are divided by 6000 rpm, then:
//      1 = [(x2 - x1) / 4000] rev / [(1 / 6000) min * 6000rpm]
//
// Because (x2 - x1) must be < 4000 (max) for QPOSCNT increment,
// (x2 - x1) / 4000 < 1 for CW rotation, and because (x2 - x1) must be >- 4000
// for QPOSCNT decrement, (x2 - x1) / 4000 > -1  for CCW rotation
//
//      speedFR = [(x2 - x1) / 4000] / [(1 / 6000) min * 6000rpm]
//              = (x2 - x1) / 4000                                  -Equation 3
//
 help will be highly appreciated?

  • 0
    TI__Mastermind 20021 points

    Hi Faiz,

    The CAPCLK and UPEVNT are clock signals that are fed into the unit timer module are clocked off of two different clock signals. The unit timer is what issues periodic interrupts to the edge capture unit to note the value of the capture unit. This is used in the algorithm to calculate speed.

    In terms of the numbers used in the example: 6000rpm is equivalent to 1 rev every 10ms. This is is chosen as an example calculation

    Unit timer is configured to issue an interrupt at a frequency of 100Hz. Unit timer is clocked off of SYSCLK which runs at 100 MHz. This means one SYSCLK cycle takes 10 ns. Unit timer period is chosen as 1,000,000 SYSCLK cycles which is 10,000,000 ns (equivalent to 100Hz).

    Typically, edge capture unit is used for low-speed calculation, although it can be used here as well. Please let me know if you have any additional questions

    Regards,

    Peter

  • 0 in reply to Peter Luong
    Prodigy 40 points

    Hi Peter,

    this is a more clear understanding ,thanks

    Why 12.5ms is used below, how does that comes from (belongs to capture unit)

    www.ti.com/.../spraah1.pdf page 6

    Also, could you please tell me how do we decide appropriate frequency for unit timer. For my case, I have 160 rpm motor 4 poles, do I use the same frequency? I guess I should be going for higher frequency greater than 100Hz

    Also how 250 CAPCLK is the answer considering sysclk is 100 MHZ for 28004x

    / 3. **speedRPMPR**
//      speedRPMPR = X / (t2 - t1)                                  -Equation 4
//
// where X = QCAPCTL [UPPS] / 4000 rev (position relative to Index in 1 rev)
//
// If max / base speed = 6000 rpm:
//      6000 = (32 / 4000) / [(t2 - t1) / (SYSCLKFREQ / 64)]
//
// where 32 = QCAPCTL[UPPS] (Unit timeout once every 32 edges)
//
//      32 / 4000 = position in 1 rev (position as a fraction of 1 revolution)
//
//      t2 - t1 / (SYSCLKFREQ / 64), t2 - t1 = # of QCAPCLK cycles
//
//      QCAPCLK cycle = 1 / (SYSCLKFREQ / 64)
//                    = QCPRDLAT
//
// So:
//      6000 rpm = [32(SYSCLKFREQ / 64) * 60s/min] / [4000(t2 - t1)]
//
//      t2 - t1 = [32(SYSCLKFREQ / 64) * 60s/min]/(4000 * 6000rpm)  -Equation 5
//              = 250 CAPCLK cycles
//              = maximum (t2 - t1) = speedScaler

    Appreciate your time and help,

    Sincerely

    Faiz

  • 0 in reply to Faiz Iliyas
    TI__Mastermind 20021 points

    Hi Faiz,

    I recommend reading through the TRM as it is fairly detailed and may be able to explain things better for you. Additionally, we are working to release an eQEP module soon within our C2000 Academy training platform which may help you gain a better understanding of the eQEP.

    The QCLK frequency depends on the input quadrature signal coming from the encoder, which example says is 40Hz. 40Hz = 25ms period, but the QCLK is often a multiple of this depending on which edges of the input signal get captured. Looks like they are sampling rising and falling edge of the input signal, meaning QCLK is twice the frequency of the input clock, giving 12.5 ms period.

    The unit timer frequency is wholly dependent on how accurate you want to be in your measurement vs. how many CPU resources you want to allocate for eQEP interrupts. I think 100Hz is good to start with but if you are noticing inaccurate calculations, you may choose to sample more frequently. Note that you will have to adjust your calculations depending on the unit timer frequency.

    CAPCLK has a 3-bit divider attached to it (seen in diagram from earlier message), and looks like it was chosen to divide SYSCLK by 64

    Regards,

    Peter