TMS320F280049C: Porting Universal code_f28004x Device_Issues

You need to change the definitions for ADC in hal.h and the configuration in hal.c according to the F28004x device. You can check if the ADC result data registers have any sampling data and the input voltage on the related ADC pins.

Thank You "Yanming Luo".
I Changed the definitions  for ADC in hal.h and the configuration in hal.c according to the F28004x device. Now, I am Checking ADC Result data registers its Working for First Time. then Terminated the Program and load the program second time, am not Getting ADC Readings. I Don't know what Reason Behind it.

I Think It's Working in every Power ON Conditions.

Can You Solve This Issue?.

Below I am Sharing my "flash_lib.cmd" Memory Mapping File. Can You check it once and Update me If anything Mistake Done by Me.

/*
// FILE:    f28002x_flash_lib_is_eabi.cmd
//
// TITLE:   Linker Command File For F280025 examples that run out of Flash
//
//
//          Keep in mind that L4, L5,L6 and L7 are protected by the code
//          security module.
//
//          What this means is in most cases you will want to move to
//          another memory map file which has more memory defined.
//
*/

MEMORY
{
   BEGIN           	  : origin = 0x00080000, length = 0x00000002
   BOOT_RSVD	      : origin = 0x00000002, length = 0x00000126

/* RAMLS5        	  : origin = 0x0000A800, length = 0x00000800 */
/* RAMLS6    		  : origin = 0x0000B000, length = 0x00000800 */
/* RAMLS7        	  : origin = 0x0000B800, length = 0x00000800 */
   RAMLS567    		  : origin = 0x0000A600, length = 0x00001A00

   /* Flash sectors */
   /* BANK 0 */
/* FLASHBANK0_SECT0	  : origin = 0x00080002, length = 0x00000FFE */
   FLASHBANK0_BOOT	  : origin = 0x00080002, length = 0x00000FFE	/* remote update */
/* FLASHBANK0_SECT1	  : origin = 0x00081000, length = 0x00001000 */
/* FLASHBANK0_SECT2	  : origin = 0x00082000, length = 0x00001000 */
/* FLASHBANK0_SECT3	  : origin = 0x00083000, length = 0x00001000 */
/* FLASHBANK0_SECT4	  : origin = 0x00084000, length = 0x00001000 */
/* FLASHBANK0_SECT5	  : origin = 0x00085000, length = 0x00001000 */
/* FLASHBANK0_SECT6	  : origin = 0x00086000, length = 0x00001000 */
/* FLASHBANK0_SECT7	  : origin = 0x00087000, length = 0x00001000 */
/* FLASHBANK0_SECT8	  : origin = 0x00088000, length = 0x00001000 */
/* FLASHBANK0_SECT9	  : origin = 0x00089000, length = 0x00001000 */
/* FLASHBANK0_SECT10  : origin = 0x0008A000, length = 0x00001000 */
/* FLASHBANK0_SECT11  : origin = 0x0008B000, length = 0x00001000 */
/* FLASHBANK0_SECT12  : origin = 0x0008C000, length = 0x00001000 */
/* FLASHBANK0_SECT13  : origin = 0x0008D000, length = 0x00001000 */
   FLASHBANK0_CODE	  : origin = 0x00081000, length = 0x0000D000	/* control code */

/* FLASHBANK0_SECT14  : origin = 0x0008E000, length = 0x00001000 */
   FLASHBANK0_DATA 	  : origin = 0x0008E000, length = 0x00001000	/* constant data */

   FLASHBANK0_SECT15  : origin = 0x0008F000, length = 0x000FF0
   FLASHBANK0_SEC15_RSVD	: origin = 0x08FFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   BOOTROM			  : origin = 0x003F0000, length = 0x00008000
   BOOTROM_EXT		  : origin = 0x003F8000, length = 0x00007FC0
   RESET           	  : origin = 0x003FFFC0, length = 0x00000002

   RAMM0S          	  : origin = 0x00000128, length = 0x00000118	/* stack, on-chip RAM block M0 part */
   RAMM1D         	  : origin = 0x00000240, length = 0x000005B8	/* on-chip RAM block M0 part & M1 */
   RAMM1_RSVD         : origin = 0x000007F8, length = 0x00000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMGS0     	   	  : origin = 0x0000C000, length = 0x000007F8
   RAMGS0_RSVD        : origin = 0x0000C7F8, length = 0x00000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMLS4        	  : origin = 0x0000A000, length = 0x00000600
}


SECTIONS
{
   .reset           : > RESET, 				   	TYPE = DSECT
   codestart		: > BEGIN,     		 	   	ALIGN(4)


   GROUP
   {
#if defined(SFRA_ENABLE)
       .TI.ramfunc
       {
         -l sfra_f32_tmu_eabi.lib<sfra_f32_tmu_collect.obj> (.text)
         -l sfra_f32_tmu_eabi.lib<sfra_f32_tmu_inject.obj> (.text)
       }
#else
	   .TI.ramfunc
#endif
       ramfuncs
       	/* Digital Controller Library functions */
       dclfuncs
       dcl32funcs
   }          LOAD = FLASHBANK0_CODE
              RUN = RAMLS567,
              LOAD_START(RamfuncsLoadStart),
              LOAD_SIZE(RamfuncsLoadSize),
              LOAD_END(RamfuncsLoadEnd),
              RUN_START(RamfuncsRunStart),
              RUN_SIZE(RamfuncsRunSize),
              RUN_END(RamfuncsRunEnd),
              ALIGN(2)

	ctrlfuncs : {
	            }
	          LOAD = FLASHBANK0_CODE
              RUN = RAMLS567,
              LOAD_START(ctrlfuncsLoadStart),
              LOAD_SIZE(ctrlfuncsLoadSize),
              LOAD_END(ctrlfuncsLoadEnd),
              RUN_START(ctrlfuncsRunStart),
              RUN_SIZE(ctrlfuncsRunSize),
              RUN_END(ctrlfuncsRunEnd),
              ALIGN(2)

   .text            : > FLASHBANK0_CODE,	ALIGN(8)
   .cinit           : > FLASHBANK0_CODE,	ALIGN(4)
   .switch          : > FLASHBANK0_CODE,	ALIGN(4)
   .cio				: > FLASHBANK0_CODE
   .pinit           : > FLASHBANK0_CODE,	ALIGN(4)
   .const           : > FLASHBANK0_CODE,  	ALIGN(4)
   .init_array      : > FLASHBANK0_CODE, 	ALIGN(4)

   .stack           : > RAMM0S
   .bss             : > RAMM1D
   .bss:output      : > RAMM1D
   .bss:cio         : > RAMM1D
   .data            : > RAMM1D
   .sysmem          : > RAMM1D

     est_data             	 : > RAMLS4
}

SECTIONS
{
   prms_data 		      : > FLASHBANK0_DATA

   GROUP
   {
      user_data
	  foc_data
   }
   		LOAD = RAMM1D
        LOAD_START(ctrlVarsLoadStart),
        LOAD_SIZE(ctrlVarsLoadSize),
        LOAD_END(ctrlVarsLoadEnd)

   GROUP
   {
      sys_data
      ctrl_data
      motor_data
   }
        LOAD = RAMGS0
        LOAD_START(motorVarsLoadStart),
        LOAD_SIZE(motorVarsLoadSize),
        LOAD_END(motorVarsLoadEnd)


   GROUP
   {
	  vibc_data
	  dmaBuf_data

      datalog_data
      graph_data

      sfra_data
      SFRA_F32_Data
   }
        LOAD = RAMGS0
        LOAD_START(extVarsLoadStart),
        LOAD_SIZE(extVarsLoadSize),
        LOAD_END(extVarsLoadEnd)
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/

Prem Chintala said:

Now, I am Checking ADC Result data registers its Working for First Time.

What do you mean "First Time"? Can the motorControlISR enter periodically as the PWM/Control frequency you set? Do you change the trigger SOC for ADC as the PWM you use?

Thank You For Your Reply.

ISR Enter Periodically as PWM Frequency. ISR Count Also Incremented.

My Problem Is ADC Results Are Not Updated. Is There any Changes needed In My Code Files.

When I Reset My Controller It's Woking, After Terminating The Program again I am trying to Flash the code. It's not working.

Prem Chintala said:

When I Reset My Controller It's Woking, After Terminating The Program again I am trying to Flash the code. It's not working.

What do you mean this? Are the ADC results data updated correctly when you reset the controller.

Do you configure the ADC reference voltage according to your board? And change the driverlib files in the lab for F28004x? What value are in the ADC result register?

Thank You For Your Efforts.

Yes,In Some Cases ADC C Registers Updated Correctly. sometimes It's Missing.

I Have A Doubt, While Putting Breakpoint At ISR Count In Main ISR(It's Working). Then Placing Break Point At Hal_ADCreadresults(), Automatically Break Point Disables. Can You Give Clarity On This.

Why ADC Peripheral Not Working in My Code?

Please Help Me As Soon As Possible.