Other Parts Discussed in Thread: TMDXIDDK379D
Greetings,
I have a couple of questions regarding the implementation of the tmdxiddk379d FOC fast current loop code. In the fcl_f2837x_tmdxiddk.c source file, the FCL_initADC() function is called to specify the two channels that will be used for the fast current loop current sensing:
// // This function initializes the ADC PPB result bases, as well as the ADC // module used to sample phase W. Ensure that the final argument passed // corresponds to the ADC base used to sample phase W on the HW board // FCL_initADC(ADCARESULT_BASE, ADC_PPB_NUMBER1, ADCBRESULT_BASE, ADC_PPB_NUMBER1, ADCA_BASE);
1) From the configure_ADC() function, the channels passed into the FCL_initADC() function are motor phase currents V (analog input A2) and W (analog input B2). The final argument passed into FCL_initADC() is the ADC base used to sample phase W. From the previous sentence this should be ADCB_BASE, however, in the example code ADCA_BASE is passed into the function. Does it matter which one you pass through? It looks like this is used to set up the proper interrupt flag.
2) After the FCL ADC initialization is set up, the register with the ADC PPB result is called in fcl_cpu_code.c in order to get the phase current value for the control process:
#define FCL_CLARKE_ADC_IN() \ clarke1Alpha = (float32_t)((int16_t)HWREGH(curA_PPBRESULT) * \ FCL_params.adcScale); \ clarke1Beta = ((clarke1Alpha + \ (2.0 * ((float32_t)((int16_t)HWREGH(curB_PPBRESULT)) * \ FCL_params.adcScale))) * ONEbySQRT3);
curA_PPBRESULT and curBPPBRESULT are pointers to registers which hold the motor phase current V and W values. From this section of code, you can see that the V phase current is set equal to the alpha component of the clarke transformation. Shouldn't phase U be set to the alpha component? The way that curA_PPBRESULT and curBPPBRESULT are named seem to imply that phase currents U and V should be getting sampled instead of V and W.
I bring this up because I am running some hardware in the loop simulations. My hardware in the loop system pmsm motor model defines the clarke transform as the U phase current in phase and equal to the alpha component. Because the TI code defines the clarke transform as the V phase current in phase with the alpha component, it creates unideal performance where some d axis current is generated when it shouldn't be (this is an SPM motor). This then obviously takes away from the torque I'm able to generate during the simulation. I attempted to pass the U (analog input A0) and V (analog input A2) phase current channels into FCL_initADC(), along with ADC_ABASE as the final input argument, but the control is not working properly, despite the fact that the registers are being read properly.
3) Can I measure phase currents U and V for the FCL code instead of phase current V and W?
Thank you for your assistance, it is greatly appreciated.