TMS320F280049: lin_ex3_sci_dma

Yale Li 李耀先

Part Number: TMS320F280049

Hi Team,

Set to trigger an interrupt at the start of reception:

DMA_setInterruptMode(DMA_CH6_BASE, DMA_INT_AT_BEGINNING);

Start processing data when it is detected that no new data is being received. Since the received data will be smaller than TRANSFER:

DMA_configTransfer(DMA_CH6_BASE, TRANSFER, -0, 1);

In the current test, restarting receiving data cannot trigger a new interrupt:

DMA_startChannel(DMA_CH6_BASE);

In the actual test, both LIN and DMA need to be cleared.

May I ask which registers need to be cleared and how to do it?

Thanks & Regards

Yale Li

over 3 years ago

0 Yale Li 李耀先 over 3 years ago

TI__Expert 4660 points

Found the specific problem.
Since the customer sets the burst to 1, the DMA receives on the basis of 1word. This problem occurs when the received data is an odd number. How to solve it? How to set the receive register?

Thanks & Regards

Yale Li

+1 Vince over 3 years ago in reply to Yale Li 李耀先

TI__Mastermind 19795 points

Hi Yale,

Thanks for your question. I may need to connect you with the DMA expert, but in the meantime, can you confirm what your LIN FIFO (multibuffer) interrupt level is? It should be 1 to match the burst of 1 for the DMA. I believe that may be the issue here.

Regards,

Vince

0 Yale Li 李耀先 over 3 years ago in reply to Vince

TI__Expert 4660 points

Hi Vince,

Thanks for your reply.

How to check the interrupt level?

Thanks & Regards

Yale Li

+1 Vince over 3 years ago in reply to Yale Li 李耀先

TI__Mastermind 19795 points

Hi Yale,

Please see the "Receive DMA Requests" section of the TRM LIN chapter:

As you can see, the LENGTH determines when the DMA request is triggered.

Please also note the multiprocessor mode setting and DMA mentions above.

If you're having issues, I would recommend disabling multibuffer mode.

Also please note the bottom text (boxed in green) in the Receive Interrupt section below:

Regards,

Vince

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TMS320F280049: lin_ex3_sci_dma