Hi Team,
I have a customer who is facing issue to boot the CPU from flash. They set the GPIO to select the boot option, however some units can be booted but most units can't.
The summary of what we are observing:
- We have a .hex file of some code, (not relevant what code it is, because even a simple blinking LED application is failing) we are almost certain that the watchdog and ecc has been disabled.
- This .hex file is built from one PC and tested in Singapore and other country.
- We download the .hex file either via SCI channel (using C2Prog software) or JTAG to the internal flash of the processor (TMS320F28388D)
- After power down and changing the boot mode pins to boot from flash; the boot up fails ( On some of the units )
- In addition (for the failed units), we observe that the XRSn reset pin is being driven by the processor, and is happening periodically going high and then low again with a rate of around ~200ms
- We also observe that for the exact same .hex file downloaded to some units, the boot up works completely fine.
This seems to point to something very marginal in the hardware but we have no exact pin point on where the failure is coming from. We need help on narrowing the search.
We have scoured the TI forums but there doesn't seem to be any matching behaviors.
We are constantly suspecting the watchdog, and the things that we checked:
- The codestart.asm seems to be point to the right place
- The assembly code of the codestart.asm definitely disabling the watchdog
- We verified the compiler output file location is linking the right codestart.asm file
- We ran the code from jtag and everything is working correctly
- We checked from jtag to run from address 0x80000 (start of internal flash) to follow the sequence of the code start and it appears to be correct
Please kindly advise if there is anything else that we should check and if there is something that is done wrong.
Thanks a lot.
Best Regards,
Ernest