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TMS320C2809 SPI Dynamic Clock Rate

Loc Pham
Prodigy 200 points

Hello Everyone,

I am using TMS320C2809 SPI-B module as the master to communicate with USB (slave) chip. The datasheet indicate Master mode max clk rate is 25MHz and receive mode is 12.5MHz. Can I dynamically change the SPI clock rate via SPIBRR register to clock at 25MHz during transmit and 12.5MHz during receive mode? (This is well within spec of slave chip which can handle up to 26MHz.)  If I can dynamically change the SPI clock between 25/12.5 MHz, is there any delay needed to wait for clock to be stable or very much set and go?

Thank you very much.

Best Regards,

Loc

  • 0
    TI__Expert 3760 points

    Loc -

    The short answer is no -

    To prevent unwanted or unforseen events from occurring during or as a result of initialization changes (such as changing the SPIBRR register for the SPI clock rate), it is recommended (and stated in the SPI reference guide) that you clear SPI SW RESET bit (in SPICCR bit 7) prior to changing any of the configuration settings, and then set the bit again after changing the configuration settings.

  • 0 in reply to Chrissy Chang
    Prodigy 200 points

    Hello Chrissy,

    Thank you for the info, and I do have that protection in when changing the baud rate. Clear SPI SW RESET, set baud rate, Set SPI SW RESET. However, there is another concern I forgot to mention in the question is that the firmware is also dynamically changing the system clocks (CPU and peripherals) between 10MHz and 100Mhz to save power as well as to reduce heat.

    So, there are cases the SPI clock is being reduced from 25/12.5 MHz to 2.5/1.25 MHz (when LSPCLK is set down to 10 MHz from 100MHz without changing SPIBRR). Do I need to reset the SPI via SW RESET or it would survive that change without glitch?

    Thank you very much for your help.

    Best Regards,

    Loc