TMS320F280049C: TMS320F280049C

Hi Arnaud,

Our expert will get back on this today.

Hi Arnaud, 

Can you provide more details on what you are wanting to implement with the CLB? By counter, do you mean you want to use 16 CLB outputs to simulate a 16-bit counter? Keep in mind that each CLB only has 8 inputs so this would require 2 CLB tiles at the least.

Regards,

Peter

I want to be able to control an external DAC (LTC1668) at very high speed (As fast as I can go, up to 25Msps if possible). Instead of using a CPLD, I was thinking if the CLB can control this DAC (generate a ramp slope) that I can trigger/reset based on a PWM Event or trigger. The internal slope compensator for peak current mode control inside your DSP is limited to 12 bits and I need at least 16 bits resolution. Thanks a lot for your help.

Hi Arnaud,

Thanks for clarifying this, please allow me time to discuss with my teammates to see if this is something that can be done with the CLB

Regards,

Peter

You want to connect to the CLOCK input or the DATA INPUT?

Hi, I want to be able to control the DAC at very fast speed using the CLB. In this case, it has to be both. Clock and data as clock control the rate of data input.

Regards,

Arnaud

CLB is capable but getting 17 SIGNALS out is not what I would advise you to do.

You want 1 CLOCK INPUT + 16 DATA INPUT signals. You need to use 2 CLBs which would mean you cannot use one TIMER output and one CLB.

So I think For the 16 DATA INPUT you shouldn't use the CLB.

Does that make sense? Each CLB has 8 outputs.

Nima