Other Parts Discussed in Thread: TIDM-02000
Hi all
I want to know is there any resource i can refer to get help for implement the peak current mode control.
There are only two recourses i found and it was not readable at all. One of them was written i assembly for no reason.
Other one is also written with lines which use direct access to the registers, also not readable. Whole register written at once and cannot understand how to configure slope compensation and comparator blocks
One of them is the TIDM-02000.
See the following code snippet used for comparator config.
ASSERT(CMPSS_isBaseValid(base)); // // Write the high comparator configuration to the appropriate register. // EALLOW; HWREGH(base + CMPSS_O_COMPCTL) = (HWREGH(base + CMPSS_O_COMPCTL) & ~CMPSS_HICMP_CTL_M) | config; EDIS; }
This is not readable at all. Why they used this raw data access when there is a perfect registry structure defined by TI, for each registry access.
Can you please suggest how i can find a readable code for this comparator block and slope compensation hardware.
This development example didn't used a single registry structure.
What is the meaning of developing a code no one can read, especially when it comes to reference designs.
Why TI engineers no longer use the convenient Registry peripheral structures like in the past.
Regards
Damith