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TMS320F28377D: HRPWM configuration for Phase shift

Sergio Toledano Dus
Prodigy 10 points
Part Number: TMS320F28377D
Other Parts Discussed in Thread: TMS320F28379D

Hello everyone,
I'm new in this forum and I'm not very expert programming for the TMS320f28379d microcontroller .
I would like to configure the HRPWM module to make a phase-shift modulation. As I would like to make EPWM3 leading or lagging equally, I have made EPWM1 Master, to clock both EPWMs ( 3 and 7).
In the future I would also like to be able to control the bridge dutys with High Resolution. I have a piece of code, but I have not managed to control it with HR capabilities (I have only managed to activate the EPWM modules).
On the other hand, since I work with quite controlled conditions, at the laboratory, is it necessary to activate the SFO module?

void ConfigureEPWM1(Uint32 period)
{

    EALLOW;
    //Configuramos los GPIO del EPWM1
    GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;          // Enable pull-up on GPIO0 (EPWM1A)
    GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;          // Enable pull-up on GPIO1 (EPWM1B)

    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0;         // Configure PIN as GPIO TODO:(Esto lo hago así para poder trucar la placa)
    GpioCtrlRegs.GPADIR.bit.GPIO0 = 0;          //TODO: Esta linea la quitaremos de aquí. Seleccionamos el pin como entrada
    GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;         // Configure GPIO1 as EPWM1B

    // Setup counter mode
    EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm1Regs.TBPRD = period;                   // Set half-period to 500 counts, 2*500*10 ns = 10 us => f = 100 kHz
    EPwm1Regs.CMPA.bit.CMPA = period >> 1;      // Set compare A value to 167 counts 50%
    EPwm1Regs.CMPA.bit.CMPAHR = (1 << 8);       // initialize HRPWM extension
    EPwm1Regs.TBPHS.all = 0;
    EPwm1Regs.TBCTR = 0;
    EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module


    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;  // Count up and down
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;     // EPWM1 is the Master
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;    // Clock ratio to EPWMCLK
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    EPwm1Regs.AQCTLA.bit.CAU = AQ_NO_ACTION;
    EPwm1Regs.AQCTLA.bit.CAD = AQ_NO_ACTION;    //ZRO set PRD reset (EPWM1A)
    EPwm1Regs.AQCTLB.bit.ZRO = AQ_NO_ACTION;    //ZRO set PRD reset (EPWM1B)
    EPwm1Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;

    EPwm1Regs.HRCNFG.all = 0x0;             // clear all bits first
    EPwm1Regs.HRCNFG.bit.EDGMODE = HR_BEP;  // MEP control on Both edge
    EPwm1Regs.HRCNFG.bit.CTLMODE = HR_PHS;
    EPwm1Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;

    //EPwm1Regs.HRPCTL.bit.TBPHSHRLOADE = 1;    // Enable TBPHSHR sync
    EPwm1Regs.HRPCTL.bit.HRPE = 1;    // High Resolution Period Enable
    EDIS;
}

void ConfigureEPWM3(Uint32 period)
{
    EALLOW;
    //Configuramos los GPIO del EPWM3
    GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0;    // Enable pull-up on GPIO4 (EPWM3A)
    GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;    // Enable pull-up on GPIO5 (EPWM3B)

    GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1;   // Configure GPIO4 as EPWM3A
    GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;   // Configure GPIO5 as EPWM3B

// Setup counter mode
    EPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm3Regs.TBPRD = period;                 // Set half-period to 500 counts, 200*10 ns = 2 us => f = 500 kHz
    EPwm3Regs.CMPA.bit.CMPA = period >> 1;    // Set compare A value to 100 counts 50%
    EPwm3Regs.CMPA.bit.CMPAHR = (1 << 8);   // initialize HRPWM extension
    EPwm3Regs.TBPHS.bit.TBPHS = period >> 1;  //Modo Buck este es el maestro
    EPwm3Regs.TBCTR = 0;

    EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;        // Count up
    EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;               // EPWM3 is the Master
    EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Sync down-stream module
    EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;              // Clock ratio to EPWMCLK
    EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
    EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET;;    //Al comienzo del periodo encendemos el transistor
    EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
    EPwm3Regs.AQCTLB.bit.CAD = AQ_NO_ACTION;    //ZRO set PRD reset (EPWM1A)
    EPwm3Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;

    EPwm3Regs.ETSEL.bit.SOCAEN = 1;                    // Enable SOC on A group
    EPwm3Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD;      // Select SOC on PERIOD;
    EPwm3Regs.ETPS.bit.SOCAPRD = ET_1ST;               // Generate pulse on 1st event

    EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
    EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module

    EPwm3Regs.DBRED.bit.DBRED = 3;
    EPwm3Regs.DBFED.bit.DBFED = 3;

    EPwm3Regs.HRCNFG.all = 0x0;             // clear all bits first
    EPwm3Regs.HRCNFG.bit.EDGMODE = HR_BEP;  // MEP control on Both edge
    EPwm3Regs.HRCNFG.bit.CTLMODE = HR_PHS;
    EPwm3Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
    EPwm3Regs.HRCNFG.bit.AUTOCONV = 0;      // Enable auto-conversion
    EPwm3Regs.HRPCTL.bit.TBPHSHRLOADE = 1;    // Enable TBPHSHR sync
    EPwm3Regs.HRPCTL.bit.HRPE = 1;    // High Resolution Period Enable
    EDIS;
}

void ConfigureEPWM7(Uint32 period)
{
    EALLOW;
    //Configuramos los GPIO del EPWM6
    GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;    // Enable pull-up on GPIO10 (EPWM6A)
    GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;    // Enable pull-up on GPIO11 (EPWM6B)

    GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;   // Configure GPIO0 as EPWM6A
    GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;   // Configure GPIO1 as EPWM6B
    // Setup counter mode
    EPwm7Regs.TBCTL.bit.PRDLD = TB_SHADOW;
    EPwm7Regs.TBPRD = period;                 // Set half-period to 500 counts, 200*10 ns = 2 us => f = 500 kHz
    EPwm7Regs.CMPA.bit.CMPA = period >> 1;    // Set compare A value to 100 counts 50%
    EPwm7Regs.CMPA.bit.CMPAHR = (1 << 8);   // initialize HRPWM extension
    EPwm7Regs.TBPHS.bit.TBPHS = period >> 1;  //Modo Buck este es el maestro
    EPwm7Regs.TBCTR = 0;

    EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;        // Count up
    EPwm7Regs.TBCTL.bit.PHSEN = TB_ENABLE;               // EPWM3 is the Master
    EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Sync down-stream module
    EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;              // Clock ratio to EPWMCLK
    EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR=Zero
    EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    EPwm7Regs.AQCTLA.bit.ZRO = AQ_SET;;    //Al comienzo del periodo encendemos el transistor
    EPwm7Regs.AQCTLA.bit.CAU = AQ_CLEAR;
    EPwm7Regs.AQCTLB.bit.CAD = AQ_NO_ACTION;    //ZRO set PRD reset (EPWM1A)
    EPwm7Regs.AQCTLB.bit.PRD = AQ_NO_ACTION;

    EPwm7Regs.ETSEL.bit.SOCAEN = 1;                    // Enable SOC on A group
    EPwm7Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD;      // Select SOC on PERIOD;
    EPwm7Regs.ETPS.bit.SOCAPRD = ET_1ST;               // Generate pulse on 1st event

    EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary
    EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module

    EPwm7Regs.DBRED.bit.DBRED = 3;
    EPwm7Regs.DBFED.bit.DBFED = 3;
    EPwm7Regs.HRCNFG.all = 0x0;             // clear all bits first
    EPwm7Regs.HRCNFG.bit.EDGMODE = HR_BEP;  // MEP control on Both edge
    EPwm7Regs.HRCNFG.bit.CTLMODE = HR_PHS;
    EPwm7Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
    EPwm7Regs.HRCNFG.bit.AUTOCONV = 0;      // Enable auto-conversion
    EPwm7Regs.HRPCTL.bit.TBPHSHRLOADE = 1;    // Enable TBPHSHR sync
    EPwm7Regs.HRPCTL.bit.HRPE = 1;    // High Resolution Period Enable
    EDIS;
    }

Thank you in advance!!

  • 0
    TI__Genius 17836 points

    Hello Sergio,

    I will try and take a look at this today. If I don't reply with an update today, I will update you on Monday of any further questions. 

    From a quick glance everything looks like it is configured correctly, have you tried looking at any examples from C2000Ware? (Under the driverlib/f2837xd/examples/cpu1/hrpwm)

    There are four examples to see how to use HRPWM. I hope this could help as a reference.

    Best regards,

    Ryan Ma

  • 0 in reply to Ryan Ma
    Prodigy 10 points

    Thank you very much for your help Ryan Ma
    I have gone through the examples and have managed to get them working.
    The problem is that these examples do not fit my needs. On the other hand, I have also had problems including the SFO library....
    Thanks!!!

  • 0 in reply to Sergio Toledano Dus
    TI__Genius 17836 points

    Hi Sergio, 

    For the SFO library I will contact a co worker that knows more about that to help answer your question.

    For the snippet of code you sent, what are you getting as your outputs? Could you send any waveforms of what you're expecting or waveforms from an oscilloscope of what you're seeing?

    Sergio Toledano Dus said:
    In the future I would also like to be able to control the bridge dutys with High Resolution. I have a piece of code, but I have not managed to control it with HR capabilities (I have only managed to activate the EPWM modules).

    Ryan Ma

  • 0 in reply to Sergio Toledano Dus
    TI__Expert 6880 points

    The SFO library is an optimization library which adjust the Micro-Edge Positioner to provide a better high resolution output based on the ambient conditions such as temperature. As you've pointed out, if the need to automatically regulate the MEP edge is not there, then you can skip using SFO.

    Though, there is no harm in using the lib, the only thing to be noted is the time it takes to execute the SFO calibration. If the application is time critical, you can save some cycles by not using SFO, else we would recommend using the SFO.

    Hope this helps!

    Aditya

  • 0 in reply to Aditya Dholakia
    Prodigy 10 points

    Thank you very much Aditya,
    Just to verify, if I don't want to make use of autoconversion, nor update the "HRMSTEP" registry regularly; then there is no need to run even the first time the SFO() function?

    Thank you!

  • 0 in reply to Ryan Ma
    Prodigy 10 points

    Thank you very much Ryan Ma,
    I manage to do the phase shift correctly but not with the accuracy of HRPWM.
    Until thursday I won't be able to access the lab...until then I will keep studying to see if I got something wrong.

    Thank you!

  • 0 in reply to Sergio Toledano Dus
    TI__Expert 6880 points

    That's correct. Only if you wish to use the auto conversion feature, you need to use the SFO library. Else, manually you can code the HRMSTEP.

  • 0 in reply to Ryan Ma
    Prodigy 10 points

    Good morning,
    I have managed to get the HRPWM module to work correctly in the "Duty control" and "Dead band" cases; but I am still not able to activate the "Phase-shift" capability.There are a few points that I have not yet been able to resolve:

    • On page 1953 they say that the "TBPHSHR" register should not be used, instead the "TRREM" register should be used. How do I make use of this register? In the normal way?,just as I would use any other, but bearing in mind that it is "Eallow"?
    • The note on page "1967" about the "SYNCOSEL" registry and how to synchronize the modules I have yet to understand.

    Thanks!!

  • 0 in reply to Sergio Toledano Dus
    TI__Genius 17836 points

    Hi Sergio, 

    1. Yes, use it the normal way just like you would use any other register. You can R/W to this register.

    Sergio Toledano Dus said:
    On page 1953 they say that the "TBPHSHR" register should not be used, instead the "TRREM" register should be used. How do I make use of this register? In the normal way?,just as I would use any other, but bearing in mind that it is "Eallow"?

    2. I will have to double check on this before providing a better explanation. I will be able to update you on Monday.

    Sergio Toledano Dus said:
    • The note on page "1967" about the "SYNCOSEL" registry and how to synchronize the modules I have yet to understand.