Hello,
I am using TMS320F28334, the connection for JTAG are as per image shared below which is given in the technical documentation for the given MCU.
I am facing problem in which uploading the code. I am using TMS320-XDS100-V2 Debugger as a emulator. I am sharing the image of the error. I request you to please guide me through the solution.
First I was getting this error as above image. then after restarting the CCS i am getting error as below.
Thanks & Regards,
Raj.
Hi Raj,
Inside your CCS project, there is a folder named 'targetConfigs', which should include a .ccxml file, special for the device and the debugger that you are using. If you double click the .ccxml file, it will open the target config in a menu like the one shown below. Make sure that the debug probe and the device match the ones that you are using. Then click 'Test Connection' as shown in the screenshot below.
Please post the output from this log, it will help us determine what kind of error you are experiencing.
Best Regards,
Ben Collier
Hi Ben,
I have done the Target configuration properly according to my device and debugger. In 'Test Connection' I don't see any errors.
The log are as given below:
[Start]
Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the board config pathname(s)]------------------------------------
C:\Users\Bacancy\AppData\Local\TEXASI~1\
CCS\ccs1040\0\1\BrdDat\testBoard.dat
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'Jun 25 2021'.
The library build time was '11:45:30'.
The library package version is '9.4.0.00129'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
-----[The log-file for the JTAG TCLK output generated from the PLL]----------
There is no hardware for programming the JTAG TCLK frequency.
-----[Measure the source and frequency of the final JTAG TCLKR input]--------
There is no hardware for measuring the JTAG TCLK frequency.
-----[Perform the standard path-length test on the JTAG IR and DR]-----------
This path-length test uses blocks of 64 32-bit words.
The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 38 bits.
The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.
-----[Perform the Integrity scan-test on the JTAG IR]------------------------
This test will use blocks of 64 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG IR Integrity scan-test has succeeded.
-----[Perform the Integrity scan-test on the JTAG DR]------------------------
This test will use blocks of 64 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG DR Integrity scan-test has succeeded.
[End]
The error I am currently getting is as given below:
waiting for your reply.
Thanks & Regard,
Raj
Hi Raj,
Thankfully the successful 'Test Connection' should mean that there is nothing wrong with your hardware. Also I'm curious in case it might help me replicate your issue, what version of Code Composer Studio are you using?
Before we start using an oscilloscope to look at your signals, I want to make sure that I understand how you are getting your error. Please right click on your Target Configuration file, and select 'Launch Target Configuration'. That should take you to screen below. 
It appears that the circled option is not available in the screenshots that you sent me, but I am curious if you will see it after following my instructions. If so, please right click on it and select 'Connect Target'. I assume that would trigger the error message you have shown me about not being able to bring the device out of low-power mode. Can you confirm that for me?
I am also curious about the 'load program error' that you experienced. Did you do anything different after restarting CCS to see that error rather than the low-power mode error?
Best Regards,
Ben Collier