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TMS320F28027: Problems with ADC ONESHOT mode, this feature doesn't seem to work

Matt Dash
Prodigy 240 points
Part Number: TMS320F28027


hi, experts

    About ADC ONESHOT mode, Maybe because of my misconfiguration, I went into some problems as below:

    I configure SOC0,SOC4,SOC9,SOC15(the four SOCs are all software trigger),  Sequential mode
   and then enable  SOCPRICTL.ONESHOT.

   in the main loop, softwarely trigger ADC as below:  

  while(1)
  {
        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF;  // Point1
        temp = AdcRegs.ADCSOCFLG1.all;

        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF;  // Point2
        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF;
        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF;
}

I set breakpoint in two line above, there are some prolems with the result:

1.After Point1, ADCSOCFLG1 are all 1, meanwhile I think it should be 0x1000(only the first SOC);

2.After Point1, temp = 0xFFFF, which means ADCSOCFLG1 are all 1s. but I did not configure other SOC registers;

3.All 16 AdcResult registers are filled with data;

 

So i want to ask is:

1. What is the correct outcome with the case(SOC0,SOC4,SOC9,SOC15)?

2.why i got this result?

3.What is the correct way to use ONESHOT mode?

best wishes!!!

 

  • 0
    TI__Mastermind 30185 points

    Hello Matt,

    Matt Dash said:
    AdcRegs.ADCSOCFRC1.all = 0xFFFF;  // Point1

    Looking in the manual for the device, the description for the ADCSOCFRC1 register says, "Writing a 1 will force to 1 the respective SOCx flag bit in the ADCSOCFLG1 register". This would explain why all the bits in ADCSOCFLG1 are 1. The description does not seem to delineate that the SOCs need to all be configured for something like this to happen, so I expect it will still set the flags.

    As for the correct way to use ONESHOT mode, can you show me how you set up the ADC and configure the registers? I want to make sure I can verify the settings.

    Best regards,

    Omer Amir

  • 0 in reply to Omer Amir
    Prodigy 240 points

    void main()
    {
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (Uint32)&RamfuncsLoadSize);

    InitSysCtrl();

    InitAdcAio();
    InitAdc();

    EALLOW;
    AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdcRegs.SOCPRICTL.bit.ONESHOT = 1;

    AdcRegs.ADCINTFLGCLR.all = 0xFFFF;
    AdcRegs.ADCINTOVFCLR.all = 0xFFFF;

    AdcRegs.ADCSOC0CTL.bit.ACQPS = 6;
    AdcRegs.ADCSOC0CTL.bit.CHSEL = 0;
    AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 0;

    AdcRegs.ADCSOC4CTL.bit.ACQPS = 6;
    AdcRegs.ADCSOC4CTL.bit.CHSEL = 4;
    AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 0;

    AdcRegs.ADCSOC9CTL.bit.ACQPS = 6;
    AdcRegs.ADCSOC9CTL.bit.CHSEL = 7;
    AdcRegs.ADCSOC9CTL.bit.TRIGSEL = 0;

    AdcRegs.ADCSOC15CTL.bit.ACQPS = 6;
    AdcRegs.ADCSOC15CTL.bit.CHSEL = 9;
    AdcRegs.ADCSOC15CTL.bit.TRIGSEL = 0;

    EDIS;

      while(1)
      {
        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF; // Point1
        temp = AdcRegs.ADCSOCFLG1.all;

        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF; // Point2
        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF;
        DELAY_US(10);
        AdcRegs.ADCSOCFRC1.all = 0xFFFF;
      }


    }

  • 0 in reply to Omer Amir
    Prodigy 240 points

    In 28027  Errata (SPRZ292S) it says:  When the ADC conversions are initiated by any source of trigger in either sequential or simultaneous sampling mode, the first sample may not be the correct conversion result. so  ADCNONOVERLAP and CLKDIV2EN bit must be set before enable ONESHOT mode?  the result seems the same even i set these two bits.

  • +1 in reply to Matt Dash
    TI__Guru* 81560 points

    Matt,

    ONESHOT was added to the Gen2 ADCs to emulate the behavior of the Gen1 ADC, where the conversions were held in a sequence and there were limited triggers(only 3 triggers if memory serves) globally.

    The ADC in Gen 2(F2802x/3x/5x/6x) works much differently with the concept of each SOC has its own trigger source.  If multiple SOCs are configured with the same trigger source, the default behavior in that scenario is to process all of those SOCs sequentially according to the round robin scheme.  ONESHOT would only process one on each trigger occurrence.

    However, what is not clear in the TRM is that this only applies to triggers that would set SOCFLG to initiate the conversion.  Since the SW method to force an ADCSOC is to set the FLG itself by writing in SW the ONESHOT mode doesn't enter into the arbitration at all, essentially being bypassed.  So when you write 0xFFFF to the SOCFLG you will still get all of the channels converting.

    If you want to debug ONESHOT then I would set the trigger source to your SOCs to a PWM of your choice.  There is a SW force bit for the PWM SOC inside that module that would then show the difference between ONESHOT = 1 and ONESHOT = 0.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Prodigy 240 points

    yes.it work as expected,tanhk you very much. wish you a nice day~