TMS320F28388D: difference between CLB and FPGA

Hi Yale,

The CLB-based encoder implementation only requires a single CLB tile to implement the decoding logic. You can find more information about that within the PTO API reference guide at: http://ti.com/lit/sprac77

There are some major differences between the CLB and FPGA, I would recommend looking at the C2000 Academy CLB Module for a basic understanding of it. In terms of the differences between the two, the CLB is of course more limited in terms of resources and is not as feature-packed as an FPGA. However, depending on what is needing to be implemented, the CLB can be more than enough. In terms of processing speed, the CLB on the F28388D is running at 100 MHz or 150 MHz in pipeline mode. The processing speed on an FPGA is dependent on the FPGA and how you are transferring information between the two devices. I would say that the CLB is beneficial in that it is already clocked with the device which is a huge advantage. 

Please let me know if this answered your question or if you have any other specific inquiries about the CLB

Regards,

Peter