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TMS320F28379D: TMS320F28379D: the code cannot fit in the available memory

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hi,

I am trying to connect a Bluetooth module through SCI, the code worked well for CPU1, but when I tried to built it on cpu2 it is not working because of the following error:

Description    Resource    Path    Location    Type
<a href="file:/C:/ti/ccs1031/ccs/tools/compiler/dmed/HTML/10099.html">#10099-D</a>  program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. run placement with alignment/blocking fails for section ".ebss" size 0x7a1c page 1.  Available memory ranges:    .ccsproject    /Bluetooth-SCI_CPU2    line 57, external location: C:\ti\C2000Ware_4_00_00_00\device_support\f2837xd\common\cmd\2837xD_RAM_lnk_cpu2.cmd    C/C++ Problem
  I tried to increase the available memory 

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN           	: origin = 0x000000, length = 0x000002
   RAMM0           	: origin = 0x0000A2, length = 0x00035E
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          : origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   //RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
  // RAMLS4      		: origin = 0x00A000, length = 0x000800
   RESET           : origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x0000A0     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMD1           : origin = 0x00B800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS4              : origin = 0x00A000, length = 0x000800
   RAMLS5      : origin = 0x00A800, length = 0x000800
   RAMGS12          : origin = 0x018000, length = 0x001000
   RAMGS13          : origin = 0x019000, length = 0x001000
   RAMGS14          : origin = 0x01A000, length = 0x001000
   RAMGS15          : origin = 0x01B000, length = 0x001000
   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800

   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0
   .text            : >>RAMD0 |  RAMLS0 | RAMLS1 | RAMLS3,   PAGE = 0
   .cinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   .stack           : > RAMM1,     PAGE = 1
   
#if defined(__TI_EABI__)
   .bss             : > RAMLS5,    PAGE = 1
   .bss:output      : > RAMLS3,    PAGE = 0
   .init_array      : > RAMM0,     PAGE = 0
   .const           : > RAMLS5,    PAGE = 1
   .data            : > RAMLS5,    PAGE = 1
   .sysmem          : > RAMLS5,    PAGE = 1
#else
   .pinit           : > RAMM0,     PAGE = 0
   .ebss            : > RAMLS2 | RAMLS4 | RAMLS5 | RAMGS12 | RAMGS13 | RAMGS14 | RAMGS15,    PAGE = 1
   .econst          : > RAMLS5,    PAGE = 1
   .esysmem         : > RAMLS5,    PAGE = 1
#endif

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,      PAGE = 0
   #else
   ramfuncs         : > RAMM0      PAGE = 0   
   #endif
#endif

   /* The following section definitions are required when using the IPC API Drivers */
    GROUP : > CPU2TOCPU1RAM, PAGE = 1
    {
        PUTBUFFER
        PUTWRITEIDX
        GETREADIDX
    }

    GROUP : > CPU1TOCPU2RAM, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/
 but still have the same error.

I am trying to link CPU1 and CPU2 as I need to read the data from an IMU using I2C controlled by CPU1 and send the data from CPU1 to CPU2 by IPC then send the data from CPU2 using Bluetooth to a mobile app. I will attach both codes. the first is the IMU code 

#include "F28x_Project.h"
#include <math.h>
//#include"KF.h"
#include "UKF_IMU.h"

#define I2C_SLAVE_ADDR        0x68
#define I2C_NUMBYTES1          2
#define I2C_NUMBYTES2          1
#define MPU6050_ADDRESS             0x00D0
#define MPU6050_RA_SMPLRT_DIV       0x0019
#define MPU6050_RA_CONFIG           0x001A
#define MPU6050_RA_GYRO_CONFIG      0x001B
#define MPU6050_RA_ACCEL_CONFIG     0x001C
#define MPU6050_RA_FF_THR           0x001D
#define MPU6050_RA_FF_DUR           0x001E
#define MPU6050_RA_MOT_THR          0x001F
#define MPU6050_RA_MOT_DUR          0x0020
#define MPU6050_RA_ZRMOT_THR        0x0021
#define MPU6050_RA_ZRMOT_DUR        0x0022
#define MPU6050_RA_FIFO_EN          0x0023
#define MPU6050_RA_I2C_MST_CTRL     0x0024
#define MPU6050_RA_I2C_MST_STATUS   0x0036
#define MPU6050_RA_INT_PIN_CFG      0x0037
#define MPU6050_RA_INT_ENABLE       0x0038
#define MPU6050_RA_DMP_INT_STATUS   0x0039
#define MPU6050_RA_INT_STATUS       0x003A
#define MPU6050_RA_ACCEL_XOUT_H     0x003B
#define MPU6050_RA_ACCEL_XOUT_L     0x003C
#define MPU6050_RA_ACCEL_YOUT_H     0x003D
#define MPU6050_RA_ACCEL_YOUT_L     0x003E
#define MPU6050_RA_ACCEL_ZOUT_H     0x003F
#define MPU6050_RA_ACCEL_ZOUT_L     0x0040
#define MPU6050_RA_TEMP_OUT_H       0x0041
#define MPU6050_RA_TEMP_OUT_L       0x0042
#define MPU6050_RA_GYRO_XOUT_H      0x0043
#define MPU6050_RA_GYRO_XOUT_L      0x0044
#define MPU6050_RA_GYRO_YOUT_H      0x0045
#define MPU6050_RA_GYRO_YOUT_L      0x0046
#define MPU6050_RA_GYRO_ZOUT_H      0x0047
#define MPU6050_RA_GYRO_ZOUT_L      0x0048
#define MPU6050_RA_USER_CTRL        0x006A
#define MPU6050_RA_PWR_MGMT_1       0x006B
#define MPU6050_RA_PWR_MGMT_2       0x006C
#define MPU6050_RA_BANK_SEL         0x006D
#define MPU6050_RA_MEM_START_ADDR   0x006E
#define MPU6050_RA_MEM_R_W          0x006F
#define MPU6050_RA_DMP_CFG_1        0x0070
#define MPU6050_RA_DMP_CFG_2        0x0071
//#define RESTRICT_PITCH
#define DEG_RAD 0.017453292


void Ini_I2C (void);
void Ini_timer0(void);
void Ini_timer1(void);
void ACC_A(double x_dd, double y_dd, double z_dd);
__interrupt void timer1_isr(void);
__interrupt void i2c_int1a_isr(void);
__interrupt void IPPC0_ISR(void); // interrupt function to store data
Uint16 FailCount;
Uint16 IntSource,Ind;
//
// Function Prototypes
//


struct I2CMsgIn {
                   Uint16 mode;
                   Uint16 device_ADDR;
                   Uint16 NUMBYTES;
                   Uint16 sensor_Reg;
                   //Uint16 sensor_XOUT_L;
                   int16 MsgBuffer[12];
};

struct I2CMsgOut {
                    Uint16 mode;
                    Uint16 device_ADDR;
                    Uint16 NUMBYTES;
                    Uint16 MPU6050_RA;
                    Uint16 outMsg;
};
struct I2CMsgIn *CurrentMsgPtr;
struct I2CMsgOut *CurrentMsgPtrW;
Uint16 I2cb_WriteData(struct I2CMsgOut *msg);
Uint16 I2cb_ReadData(struct I2CMsgIn *msg);

int i,j,k,k1,k2,k3,k4,k5,a,f;
double dx,dy,dz,accX,accY,accZ;
double dx_f,dy_f,dz_f,accX_f,accY_f,accZ_f,tt,ts;
double in_buffer[6][20];
double temp1,temp2,temp3,temp4,temp5,temp6;
double roll,pitch,KF_roll,KF_pitch,AR;
int GGG;

UKF R_UKF,P_UKF;


void main(void)
   {
    struct I2CMsgIn   I2C_Msgin;
    struct I2CMsgOut  I2C_Msgout;
    I2C_Msgin.device_ADDR=0x68;
    I2C_Msgin.NUMBYTES=1;

    I2C_Msgout.device_ADDR=0x68;
    I2C_Msgout.NUMBYTES=2;
    //
     EALLOW;
     DevCfgRegs.CPUSEL5.bit.SCI_B =1;
     EDIS;
    InitSysCtrl();
    InitGpio();
    GPIO_SetupPinMux(19, GPIO_MUX_CPU2, 2);
    GPIO_SetupPinOptions(19, GPIO_INPUT, GPIO_PUSHPULL);
    GPIO_SetupPinMux(18, GPIO_MUX_CPU2, 2);
    GPIO_SetupPinOptions(18, GPIO_OUTPUT, GPIO_ASYNC);
    DINT;
    InitPieCtrl();
    //clear IPC flags
    IpcRegs.IPCCLR.all= 0xFFFFFFFF;
    //enable IPC PIE Interrupts
    EALLOW;
    PieVectTable.IPC0_INT = &IPPC0_ISR;
    EDIS;
    PieCtrlRegs.PIEIER1.bit.INTx13= 1;
    IER |= 0x0001;


    IpcRegs.IPCCLR.bit.IPC0= 1;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    //wait here until CPU2 is ready
    while(IpcRegs.IPCSTS.bit.IPC17 ==0)
        IpcRegs.IPCACK.bit.IPC17 =1;
    IFR=0x0000;
    InitPieVectTable();
    EALLOW;
        PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
        IER |= M_INT1;
        EINT;
    EDIS;

        EINT;  // Enable Global interrupt INTM
        ERTM;  // Enable Global realtime interrupt DBGM

      EALLOW;    // This is needed to write to EALLOW protected registers
      PieVectTable.I2CB_INT = &i2c_int1a_isr;//assign interrupt function of I2cb
      EDIS;      // This is needed to disable write to EALLOW protected registers
      // Enable I2C __interrupt 1 in the PIE: Group 8 __interrupt 1
      //
          PieCtrlRegs.PIEIER8.bit.INTx3 = 1;
      //
      // Enable CPU INT8 which is connected to PIE group 8
      //
          IER |= M_INT8;
          EINT;

    Ini_I2C();
    Ini_timer0();

    CurrentMsgPtrW= &I2C_Msgout;

    CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
    CurrentMsgPtrW->MPU6050_RA= MPU6050_RA_USER_CTRL;
    CurrentMsgPtrW->NUMBYTES=2;
    CurrentMsgPtrW->outMsg=0x00;

           FailCount= I2cb_WriteData(CurrentMsgPtrW);
                  while(I2cbRegs.I2CMDR.bit.STP==1);
                  I2cbRegs.I2CSTR.bit.XSMT=0;
                  //I2cbRegs.I2CMDR.bit.STP=0;
                  //I2cbRegs.I2CSTR.bit.BB=0;
    CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
    CurrentMsgPtrW->MPU6050_RA=MPU6050_RA_PWR_MGMT_1;
    CurrentMsgPtrW->NUMBYTES=2;
    CurrentMsgPtrW->outMsg=0x01;

       FailCount= I2cb_WriteData(CurrentMsgPtrW);
       while(I2cbRegs.I2CMDR.bit.STP==1);
            I2cbRegs.I2CSTR.bit.XSMT=0;
            //I2cbRegs.I2CMDR.bit.STP=0;
            //I2cbRegs.I2CSTR.bit.BB=0;

    CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
    CurrentMsgPtrW->MPU6050_RA= MPU6050_RA_INT_PIN_CFG;
    CurrentMsgPtrW->NUMBYTES=2;
    CurrentMsgPtrW->outMsg=0x02;

        FailCount= I2cb_WriteData(CurrentMsgPtrW);
        while(I2cbRegs.I2CMDR.bit.STP==1);
        I2cbRegs.I2CSTR.bit.XSMT=0;
       // I2cbRegs.I2CMDR.bit.STP=0;
       // I2cbRegs.I2CSTR.bit.BB=0;

    CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
    CurrentMsgPtrW->NUMBYTES=2;
    CurrentMsgPtrW->device_ADDR=I2C_SLAVE_ADDR;
    CurrentMsgPtrW->MPU6050_RA= MPU6050_RA_SMPLRT_DIV;
    CurrentMsgPtrW->NUMBYTES=2;
    CurrentMsgPtrW->outMsg=0x07;

    FailCount= I2cb_WriteData(CurrentMsgPtrW);
     while(I2cbRegs.I2CMDR.bit.STP==1);
   I2cbRegs.I2CSTR.bit.XSMT=0;
  // I2cbRegs.I2CMDR.bit.STP=0;
  // I2cbRegs.I2CSTR.bit.BB=0;

         CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
         CurrentMsgPtrW->MPU6050_RA= MPU6050_RA_CONFIG;
         CurrentMsgPtrW->NUMBYTES=2;
         CurrentMsgPtrW->outMsg=0x06;

         FailCount= I2cb_WriteData(CurrentMsgPtrW);
           while(I2cbRegs.I2CMDR.bit.STP==1);
            I2cbRegs.I2CSTR.bit.XSMT=0;
            //I2cbRegs.I2CMDR.bit.STP=0;
           // I2cbRegs.I2CSTR.bit.BB=0;
      CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
      CurrentMsgPtrW->MPU6050_RA= MPU6050_RA_GYRO_CONFIG;
      CurrentMsgPtrW->NUMBYTES=2;
      CurrentMsgPtrW->outMsg=0x00;

      FailCount= I2cb_WriteData(CurrentMsgPtrW);
        while(I2cbRegs.I2CMDR.bit.STP==1);
         I2cbRegs.I2CSTR.bit.XSMT=0;
       //  I2cbRegs.I2CMDR.bit.STP=0;
        // I2cbRegs.I2CSTR.bit.BB=0;

         CurrentMsgPtrW->mode = I2C_MSGSTAT_WRITE_BUSY;
         CurrentMsgPtrW->MPU6050_RA= MPU6050_RA_ACCEL_CONFIG;
         CurrentMsgPtrW->NUMBYTES=2;
         CurrentMsgPtrW->outMsg=0x00;

        FailCount= I2cb_WriteData(CurrentMsgPtrW);
            while(I2cbRegs.I2CMDR.bit.STP==1);
            I2cbRegs.I2CSTR.bit.XSMT=0;
            //I2cbRegs.I2CMDR.bit.STP=0;
           // I2cbRegs.I2CSTR.bit.BB=0;

    // Clear incoming message buffer
         for (i = 0; i < 12; i++)
            {I2C_Msgin.MsgBuffer[i] = 0x0000;}

i=0;k=0;

         CurrentMsgPtr->mode=I2C_MSGSTAT_SEND_NOSTOP;
         CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_XOUT_H;

         CpuTimer1Regs.TCR.bit.TRB=1;
         CpuTimer1Regs.TCR.bit.TSS=0;
        //R_UKF.setAngle(0.00); // First set roll starting angle

       // P_UKF.setAngle(0.00); // Then pitch
//f=1;


    while(1)
    {
        CpuTimer0Regs.TCR.bit.TRB=1;
        CpuTimer0Regs.TIM.all=0xFFFFFFFF;
        CpuTimer0Regs.TCR.bit.TSS=0;
        tt= CpuTimer0Regs.TIM.all;
        CurrentMsgPtrW->mode = I2C_MSGSTAT_INACTIVE;

        CurrentMsgPtr= &I2C_Msgin;
        CurrentMsgPtr->device_ADDR=I2C_SLAVE_ADDR;
        CurrentMsgPtr->NUMBYTES=1;

        while(f==1)

        {
switch(i)
{
case 0:CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_XOUT_H;
f=0;
       break;
case 1:CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_XOUT_L;
f=0;
       break;
case 2: dx=((CurrentMsgPtr->MsgBuffer[0] << 8) | CurrentMsgPtr->MsgBuffer[1]);

        dx=(dx/131)*DEG_RAD;
        in_buffer[0][k]=dx;
        f=0;
        k=k+1;
        CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_YOUT_H;
        break;
case 3: CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_YOUT_L;
f=0;
        break;
case 4:  dy=((CurrentMsgPtr->MsgBuffer[2] << 8) | CurrentMsgPtr->MsgBuffer[3]);
         dy=(dy/131)*DEG_RAD;
         in_buffer[1][k1]=dy;
         k1=k1+1;
         CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_ZOUT_H;
         f=0;
         break;
case 5:  CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_ZOUT_L;
         f=0;
         break;
case 6: dz=((CurrentMsgPtr->MsgBuffer[4] << 8) | CurrentMsgPtr->MsgBuffer[5]);
        dz=(dz/131)*DEG_RAD;
        in_buffer[2][k2]=dz;
        CurrentMsgPtr->sensor_Reg=MPU6050_RA_ACCEL_XOUT_H;
        f=0;
        k2=k2+1;
        break;
case 7: CurrentMsgPtr->sensor_Reg=MPU6050_RA_ACCEL_XOUT_L;
        f=0;
        break;
case 8: accX=((CurrentMsgPtr->MsgBuffer[6] << 8) | CurrentMsgPtr->MsgBuffer[7]);

        accX=accX;
        in_buffer[3][k3]=accX;
        k3=k3+1;
        CurrentMsgPtr->sensor_Reg=MPU6050_RA_ACCEL_YOUT_H;
        f=0;
        break;
case 9: CurrentMsgPtr->sensor_Reg=MPU6050_RA_ACCEL_YOUT_L;
        f=0;
        break;
case 10: accY=((CurrentMsgPtr->MsgBuffer[8] << 8) | CurrentMsgPtr->MsgBuffer[9]);
         accY=accY;
         in_buffer[4][k4]=accY;
         CurrentMsgPtr->sensor_Reg=MPU6050_RA_ACCEL_ZOUT_H;
         f=0;
         k4=k4+1;
         break;
case 11: CurrentMsgPtr->sensor_Reg=MPU6050_RA_ACCEL_ZOUT_L;
f=0;
        break;
case 12: accZ=((CurrentMsgPtr->MsgBuffer[10] << 8) | CurrentMsgPtr->MsgBuffer[11]);

         accZ=accZ;
         in_buffer[5][k5]=accZ;
         CurrentMsgPtr->sensor_Reg=MPU6050_RA_GYRO_XOUT_H;
         i=0;f=0;
         k5=k5+1;
         break;
}
    }
if(a==1)
   {CurrentMsgPtr->mode=I2cb_ReadData(CurrentMsgPtr);}



      if(I2C_Msgout.mode == I2C_MSGSTAT_INACTIVE)
        {
            //
            // Check incoming message status.
            //
            if(CurrentMsgPtr->mode == I2C_MSGSTAT_SEND_NOSTOP)
            {

                while(I2cb_ReadData(CurrentMsgPtr) != I2C_SUCCESS);

                CurrentMsgPtr = &I2C_Msgin;
                I2C_Msgin.mode = I2C_MSGSTAT_SEND_NOSTOP_BUSY;
            }
            //
            //
            else if(CurrentMsgPtr->mode == I2C_MSGSTAT_RESTART)
            {
                // Read data portion
                while(I2cb_ReadData(CurrentMsgPtr) != I2C_SUCCESS);
            }

        }

//I2C_MSGSTAT_RESTART
      //

          CurrentMsgPtr->mode=  I2C_MSGSTAT_RESTART;

for( j=0;j<20;j++)
 {
    temp1+=in_buffer[0][j];

    temp2+=in_buffer[1][j];

    temp3+=in_buffer[2][j];

     temp4+=in_buffer[3][j];

     temp5+=in_buffer[4][j];

     temp6+=in_buffer[5][j];
 }
 dx_f=temp1/20;//0.006667
        temp1=0;
 dy_f=(temp2/20);//+0.148;
        temp2=0;
 dz_f=temp3/20;
        temp3=0;
 accX_f=temp4/20;
        temp4=0;
 accY_f=temp5/20;
        temp5=0;
 accZ_f=temp6/20;
        temp6=0;

        if(k>=20)
           {k=0;}
        if(k1>=20)
        {k1=0;}
        if(k2>=20)
            {k2=0;}
        if(k3>=20)
            {k3=0;}
        if(k4>=20)
            {k4=0;}
        if(k5>=20)
            {k5=0;}

 ACC_A(accX_f,accY_f,accZ_f);

       // ACC_A(accX,accY,accZ);
       if ((roll < -1.5708 && KF_roll > 1.5708) || (roll > 1.5708 && KF_roll < -1.5708))
        {
            //kalmanX.setAngle(roll);
            R_UKF.setAngle(roll);
            KF_roll = roll;

          }
        else
             // KF_roll = kalmanX.getAngle(roll, dx_f, ts); // Calculate the angle using a Kalman filter
        { KF_roll=R_UKF.EstimatUKF(roll, dx_f, ts);
          AR=KF_roll-0.72;
        }
     //  if (abs(KF_roll) > 1.5708)
     //  {  dy_f = -dy_f; }// Invert rate, so it fits the restricted accelerometer reading
     //   KF_pitch = P_UKF.EstimatUKF(pitch, dy_f, ts);

       // f=0;


        a=0;
        ts= 0.00000001*(tt-CpuTimer0Regs.TIM.all);

    }
}
void Ini_I2C()
{
   EALLOW;
        //J1 ....(9-10)I2C "GPIO 104 & 105" (blue 10)
        GpioCtrlRegs.GPBGMUX1.bit.GPIO40=1;GpioCtrlRegs.GPBMUX1.bit.GPIO40=2;
        GpioCtrlRegs.GPBGMUX1.bit.GPIO41=1;GpioCtrlRegs.GPBMUX1.bit.GPIO41=2;
        GpioCtrlRegs.GPDPUD.bit.GPIO104 = 0;
        GpioCtrlRegs.GPDPUD.bit.GPIO105 = 0;

            I2cbRegs.I2CSAR.all = 0x68;     // Slave address - MPU6050
            I2cbRegs.I2CPSC.all = 15;         // Prescaler - need 7-12 Mhz on module clk
            I2cbRegs.I2CCLKL = 10;            // NOTE: must be non zero 275 work for EKF
            I2cbRegs.I2CCLKH = 5;             // NOTE: must be non zero   5  work for EKF
            I2cbRegs.I2CIER.all =0x24;       // Enable SCD & ARDY __interrupts
            I2cbRegs.I2CMDR.all = 0x0020;     // Take I2C out of reset
                                              // Stop I2C when suspended
            I2cbRegs.I2CFFTX.all = 0x6000;    // Enable FIFO mode and TXFIFO
            I2cbRegs.I2CFFRX.all = 0x2040;    // Enable RXFIFO, clear RXFFINT,
            EDIS;

}
void Ini_timer0()
{
 EALLOW;  // This is needed to write to EALLOW protected registers
     CpuSysRegs.PCLKCR0.bit.CPUTIMER0=1;
     CpuTimer0Regs.TIM.all=0xFFFFFFFF;
     CpuTimer0Regs.PRD.bit.LSW=0xFFFF;
     CpuTimer0Regs.PRD.bit.MSW=0xFFFF;
     CpuTimer0Regs.TCR.bit.TIE=0;
     CpuTimer0Regs.TCR.bit.TIF=1;
     CpuTimer0Regs.TCR.bit.TSS=0;
     CpuTimer0Regs.TCR.bit.TRB=1;
     CpuTimer0Regs.TCR.bit.FREE=1;
     CpuTimer0Regs.TCR.bit.SOFT=0;
     CpuTimer0Regs.TPR.bit.TDDR=0x00;
     CpuTimer0Regs.TPR.bit.PSC=0x0000;
     CpuTimer0Regs.TPRH.bit.TDDRH=0x00;
 EDIS;
}




Uint16 I2cb_ReadData(struct I2CMsgIn *msg)
{
    if(I2cbRegs.I2CMDR.bit.STP == 1)
        {
            return I2C_STP_NOT_READY_ERROR;
        }
    if(msg->mode ==I2C_SUCCESS)
    {
        msg->mode = I2C_MSGSTAT_RESTART;
    }
    I2cbRegs.I2CSAR.all =msg->device_ADDR;


    if(msg->mode == I2C_MSGSTAT_SEND_NOSTOP)
    {
        if(I2cbRegs.I2CSTR.bit.BB == 1)
                    {
                        return I2C_BUS_BUSY_ERROR;
                    }
        I2cbRegs.I2CDXR.all =msg->sensor_Reg;
        I2cbRegs.I2CMDR.all = 0x2620;
        while(I2cbRegs.I2CMDR.bit.STP==1);
    }

    else if(msg->mode == I2C_MSGSTAT_RESTART)
       {
           I2cbRegs.I2CCNT = 1;                   // Setup how many bytes to expect
           I2cbRegs.I2CMDR.all = 0x2C20;         // Send restart as master receiver

       }
    return I2C_SUCCESS;
}
Uint16 I2cb_WriteData(struct I2CMsgOut *msg)
{
    // Wait until the STP bit is cleared from any previous master communication.
        // Clearing of this bit by the module is delayed until after the SCD bit is
        // set. If this bit is not checked prior to initiating a new message, the
        // I2C could get confused.
        //
        if(I2cbRegs.I2CMDR.bit.STP == 1)
        {
            return I2C_STP_NOT_READY_ERROR;
        }

        //
        // Setup slave address
        //
        I2cbRegs.I2CSAR.all = msg->device_ADDR;

        //
        // Check if bus busy
        //
        if(I2cbRegs.I2CSTR.bit.BB == 1)
        {
            return I2C_BUS_BUSY_ERROR;
        }
    I2cbRegs.I2CCNT =2;
    I2cbRegs.I2CDXR.all = msg->MPU6050_RA;
    I2cbRegs.I2CDXR.all =msg->outMsg;
        //
        // Send start as master transmitter
        //
        I2cbRegs.I2CMDR.all = 0x6E20;
    return 0;
}


__interrupt void i2c_int1a_isr(void)
{
         //
        // Read __interrupt source
        //
        IntSource = I2cbRegs.I2CISRC.all;
        if(IntSource == I2C_SCD_ISRC)
           {
               //
               // If completed message was writing data, reset msg to inactive state
               //
               if(CurrentMsgPtrW->mode == I2C_MSGSTAT_WRITE_BUSY)
               {
                   CurrentMsgPtrW->mode = I2C_MSGSTAT_INACTIVE;
               }
               else
                {
                    CurrentMsgPtr->MsgBuffer[i]=I2cbRegs.I2CDRR.all;
                   i=i+1;
                   f=1;
                  // a=0;
                }
            }

        else if(IntSource == I2C_ARDY_ISRC)
        {
            if(I2cbRegs.I2CSTR.bit.NACK == 1)
            {
                I2cbRegs.I2CMDR.bit.STP = 1;
                I2cbRegs.I2CSTR.all = I2C_CLR_NACK_BIT;
            }
            else if(CurrentMsgPtr->mode == I2C_MSGSTAT_SEND_NOSTOP_BUSY)
            {
                CurrentMsgPtr->mode = I2C_MSGSTAT_RESTART;
            }
        }
        else
        {
            //
            // Generate some error due to invalid __interrupt source
            //
            __asm("   ESTOP0");
        }
        IpcRegs.IPCSENDDATA = (Uint32) KF_roll; //write the results to IPC data register
        IpcRegs.IPCSET.bit.IPC1 =1;

        //
        // Enable future I2C (PIE Group 8) __interrupts
        //
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
}
__interrupt void IPPC0_ISR(void)
{
 IpcRegs.IPCACK.bit.IPC0 =1; // clear IPC flag
GGG = (Uint16) IpcRegs.IPCRECVDATA; //read results

 }


//
void ACC_A(double x_dd, double y_dd, double z_dd)
{
float ss;
    roll = atan2(y_dd,-z_dd);
    ss=pow(z_dd*z_dd + y_dd*y_dd,0.5);
   // pitch = atan2(x_dd,sqrt(y_dd*y_dd + z_dd*z_dd))/DEG_RAD;

    if (y_dd<0)
    {
        pitch=(atan(x_dd/-ss));
    }
    else
    {
        pitch=(atan(x_dd/ss));
    }
    //pitch=pitch/DEG_RAD;
}
 this code is working well and I am able to read from the IMU.

the second code is the Bluetooth code which is not working 

//
#include "F28x_Project.h"
#include "math.h"
#include <string.h>
#include <stdio.h>



//
// Global variable
//
float tt;
float ts;
int LoopCount;
float v=0;
int x=0;
char bb;
char *msg;
char *rdataB;
int gsample;      // indicators to the send data
char *senddata;  // char matrix will be used to send the data
// example data of the send gyro data

double roll[15600];
char msg1;  //used to store the natural number
char msg2;  // first decimal
char msg3;  // second decimal
char msg4;  // third decimal
Uint16 k=0;   //counter for recived data inside the interrupt
Uint16 j=0; // counter to send the data inside the interrupt function
int i=0;
int z=0;
int t;
int counter;

//
// Function Prototypes
//
void Ini_timer0(void);
void scib_bluetooth_init(void);  // initiate the SCI peripheral and sort its configurations
void scib_fifo_init(void);      // also used to initiate the SCI peripheral
void scib_senddata(int a);          // send one character
void scib_msg(char *msg);       // used to send a group of characters
interrupt void scibReceiveIsr(void); // interrupt function to receive the command
__interrupt void IPPC1_ISR(void); // interrupt function to store data
//
// Main
//
void main(void)
{



//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
   InitSysCtrl();

//


   //CPUSEL5

//
// Step 3. Clear all __interrupts and initialize PIE vector table:
// Disable CPU __interrupts
//
   DINT;

//
// Initialize PIE control registers to their default state.
// The default state is all PIE __interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
   InitPieCtrl();

//
// Disable CPU __interrupts and clear all CPU __interrupt flags:
//
   IER = 0x0000;
   IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the __interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.

   InitPieVectTable();
   //clear IPC1 flag
   IpcRegs.IPCCLR.bit.IPC1= 1;
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

   //enable ISR of SCIB
   EALLOW;  // This is needed to write to EALLOW protected registers
   PieVectTable.SCIB_RX_INT = &scibReceiveIsr;
   PieVectTable.IPC1_INT = &IPPC1_ISR;
   EDIS;    // This is needed to disable write to EALLOW protected registers

// enable IPC PIE Interrupt
   PieCtrlRegs.PIEIER1.bit.INTx14 =1;
   IER |= 0x0001;
   // let CPU1 know that CPU2 is ready
   IpcRegs.IPCSET.bit.IPC17=1;

//
// Step 4. User specific code:
//


   scib_fifo_init();       // Initialize the SCI FIFO
   scib_bluetooth_init();   // Initialize SCI for bluetooth
   Ini_timer0();

   //
   // Enable interrupts required for this example
   //

      PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
      PieCtrlRegs.PIEIER9.bit.INTx3 = 1;   // PIE Group 9, INT3
      IER = 0x100;                         // Enable CPU INT
      IER |= M_INT1;
      EINT;
      EINT;  // Enable Global interrupt INTM
      ERTM;  // Enable Global realtime interrupt DBGM
   for(;;)
   {
       ts= 0.00000001*(tt-CpuTimer0Regs.TIM.all);

       CpuTimer0Regs.TCR.bit.TRB=1;
               CpuTimer0Regs.TIM.all=0xFFFFFFFF;
               CpuTimer0Regs.TCR.bit.TSS=0;
               tt= CpuTimer0Regs.TIM.all;
t++;


if (x==1 || x==2)

{

 //for (gsample=0; gsample <= 299;gsample++) // example vector to check the send data
    //{
  // v= sgyrodata[gsample];
    if(x==1)
    {
     v= sin(t);
    }
    if (x==2)
    {
     v= sin(t)+0.5*cos(0.5*t)+0.2*sin(2*t);
    }

  //v=x;
    int hundreds,tens,ones;
    //
    // define the sign of the send number
    //
char sign;
    if(v>=0)
    {
        sign = '0';
    }
    else
    {
        sign = '1';
        v=-v;

    }

   int v1 = v; // get the natural number
   float v2 = v-v1; // get the decimals
   int t = v2*1000; // make the decimals as natural numbers to send
   //
   // separate the ones and tens and hundreds
   //
   ones= t%10;
   tens= (t/10)%10;
   hundreds= (t/100)%10;
   //
   // convert the integers to charecters
   //
    msg1= v1 + '0';
    msg2= hundreds+ '0';
    msg3= tens+ '0';
    msg4= ones+ '0';
  //
  // create the vectror to send
  //
    /*  senddata[0]='9';
    senddata[1]='8';
    senddata[2]='7'; */
   senddata[0]='\r';
   senddata[1]='\n';
   senddata[2]= sign;
   senddata[3]= msg1;
   senddata[4]='.';
   senddata[5]=msg2;
   senddata[6]=msg3;
   senddata[7]=msg4;
   senddata[8]='\n';
  // senddata[9]='\0';
  // scib_msg(senddata); // sending the data


    for(k=0;k<=9;k++)
    {
        scib_senddata(senddata[k]);
    }

}

  gsample=0;
    }



      // }

   }


//
//  scia_echoback_init - Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F,
//                       default, 1 STOP bit, no parity
//
void scib_bluetooth_init()
{
    //
    // Note: Clocks were turned on to the SCIA peripheral
    // in the InitSysCtrl() function
    //

       ScibRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback
                                       // No parity,8 char bits,
                                       // async mode, idle-line protocol
       ScibRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK,
                                       // Disable RX ERR, SLEEP, TXWAKE
       ScibRegs.SCICTL2.bit.RXBKINTENA = 1;
       ScibRegs.SCIFFRX.all = 0x2021;


    //
    // SCIA at 9600 baud
    // @LSPCLK = 25 MHz (100 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x45.
    //
    ScibRegs.SCIHBAUD.all = 0x0001;
    ScibRegs.SCILBAUD.all = 0x0045;

    ScibRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
}

//
// scib_xmit - Transmit a character from the SCI
//
void scib_senddata(int a)
{
    while (ScibRegs.SCIFFTX.bit.TXFFST != 0) {}
    ScibRegs.SCITXBUF.all =a;
}

//
// scia_msg - Transmit message via SCIA
//
void scib_msg(char * msg)
{
    int i;
    i = 0;
    while(msg[i] != '\0')
    {
        scib_senddata(msg[i]);
        i++;
    }
}

//
// scia_fifo_init - Initialize the SCI FIFO
//
void scib_fifo_init()
{
    ScibRegs.SCIFFTX.all = 0xE040;
    ScibRegs.SCIFFRX.all = 0x2044;
    ScibRegs.SCIFFCT.all = 0x0;
}
void Ini_timer0()
{
 EALLOW;  // This is needed to write to EALLOW protected registers
     CpuSysRegs.PCLKCR0.bit.CPUTIMER0=1;
     CpuTimer0Regs.TIM.all=0xFFFFFFFF;
     CpuTimer0Regs.PRD.bit.LSW=0xFFFF;
     CpuTimer0Regs.PRD.bit.MSW=0xFFFF;
     CpuTimer0Regs.TCR.bit.TIE=0;
     CpuTimer0Regs.TCR.bit.TIF=1;
     CpuTimer0Regs.TCR.bit.TSS=0;
     CpuTimer0Regs.TCR.bit.TRB=1;
     CpuTimer0Regs.TCR.bit.FREE=1;
     CpuTimer0Regs.TCR.bit.SOFT=0;
     CpuTimer0Regs.TPR.bit.TDDR=0x00;
     CpuTimer0Regs.TPR.bit.PSC=0x0000;
     CpuTimer0Regs.TPRH.bit.TDDRH=0x00;
 EDIS;
}

interrupt void scibReceiveIsr(void)
{
    LoopCount++;
    k++;
       rdataB[k]=ScibRegs.SCIRXBUF.all;  // Read data


       /* while(j != 1)
               {
             scib_senddata(rdataB[j]);
                   j++;
               }
        j=0;*/
       bb= (char)rdataB[k];
        x= bb -'0';
        z=x;



    ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

    PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}
__interrupt void IPPC1_ISR(void)
{
 IpcRegs.IPCACK.bit.IPC1 =1; // clear IPC flag
 roll[counter] = (Uint16) IpcRegs.IPCRECVDATA; //read results
   counter++;
 if (counter>15600)
 {counter =0;
 IpcRegs.IPCSENDDATA = 777;
 IpcRegs.IPCSET.bit.IPC0 = 1;
 }

}
//
// End of file
//

regards
Hamza.

  • Hi Hamza,

    You could combine memory blocks to form larger memory blocks. Eg: 

    Combine GS1 and 2 to have a GS12 of size 0x2000

    Regards,

    Veena

  • Hi Veena,

    thanks for your reply. I tried to combine four memory blocks "RAMGS12131415          : origin = 0x018000, length = 0x004000", but it is not working. I am not sure if it is the tightway to combine the memory blocks.  Also, when I pended the Ipc interrupt function from the CPU2 code, the code is built. so I wonder if there is something wrong I am doing when I am initiating or calling the IPC interrupt.

    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode   */
    
       BEGIN           	: origin = 0x000000, length = 0x000002
       RAMM0           	: origin = 0x0000A2, length = 0x00035E
       RAMD0           	: origin = 0x00B000, length = 0x000800
       RAMLS0          : origin = 0x008000, length = 0x000800
       RAMLS1          	: origin = 0x008800, length = 0x000800
       RAMLS2      		: origin = 0x009000, length = 0x000800
       RAMLS3      		: origin = 0x009800, length = 0x000800
       RAMLS4      		: origin = 0x00A000, length = 0x000800
       RESET           : origin = 0x3FFFC0, length = 0x000002
    
    PAGE 1 :
    
       BOOT_RSVD       : origin = 0x000002, length = 0x0000A0     /* Part of M0, BOOT rom will use this for stack */
       RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
    //   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RAMD1           : origin = 0x00B800, length = 0x000800
       RAMLS5      : origin = 0x00A800, length = 0x000800
       RAMGS12131415          : origin = 0x018000, length = 0x004000
       CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
       CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
    
       CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
       CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
    }
    
    
    SECTIONS
    {
       codestart        : > BEGIN,     PAGE = 0
       .text            : >>RAMD0 |  RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,   PAGE = 0
       .cinit           : > RAMM0,     PAGE = 0
       .switch          : > RAMM0,     PAGE = 0
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
       .stack           : > RAMM1,     PAGE = 1
       
    #if defined(__TI_EABI__)
       .bss             : > RAMLS5 | RAMGS12131415,    PAGE = 1
       .bss:output      : > RAMLS3,    PAGE = 0
       .init_array      : > RAMM0,     PAGE = 0
       .const           : > RAMLS5 | RAMGS12131415,    PAGE = 1
       .data            : > RAMLS5 | RAMGS12131415,    PAGE = 1
       .sysmem          : > RAMLS5 | RAMGS12131415,    PAGE = 1
    #else
       .pinit           : > RAMM0,     PAGE = 0
       .ebss            : > RAMLS5 |  RAMGS12131415,    PAGE = 1
       .econst          : > RAMLS5 |  RAMGS12131415,    PAGE = 1
       .esysmem         : > RAMLS5 |  RAMGS12131415,    PAGE = 1
    #endif
    
    #ifdef __TI_COMPILER_VERSION__
       #if __TI_COMPILER_VERSION__ >= 15009000
        .TI.ramfunc : {} > RAMM0,      PAGE = 0
       #else
       ramfuncs         : > RAMM0      PAGE = 0   
       #endif
    #endif
    
       /* The following section definitions are required when using the IPC API Drivers */
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            PUTBUFFER
            PUTWRITEIDX
            GETREADIDX
        }
    
        GROUP : > CPU1TOCPU2RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }
    }
    
    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
    

  • Hi,

    Can you share the error message?

    Regards,

    Veena

  • Hi,

    These are the messages:

    Description    Resource    Path    Location    Type
    #10010 errors encountered during linking; "Bluetooth-SCI_CPU2.out" not built    Bluetooth-SCI_CPU2             C/C++ Problem

    Description    Resource    Path    Location    Type
    <a href="file:/C:/ti/ccs1031/ccs/tools/compiler/dmed/HTML/10099.html">#10099-D</a>  program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. run placement with alignment/blocking fails for section ".ebss" size 0x7a1c page 1.  Available memory ranges:    .ccsproject    /Bluetooth-SCI_CPU2    line 57, external location: C:\ti\C2000Ware_4_00_00_00\device_support\f2837xd\common\cmd\2837xD_RAM_lnk_cpu2.cmd    C/C++ Problem

    Description    Resource    Path    Location    Type
    gmake: *** [all] Error 2    Bluetooth-SCI_CPU2             C/C++ Problem

    Thanks,

  • Hi,

    As mentioned in the error message, the size of ebss is 0x7a1c and the RAMGS size you are added is 0x4000

    You can use :>> instead of  :> This will make linker split the section and place into multiple RAM blocks.

    Also enable the gen_data_subsections compile flag

    Regards,

    Veena

  • THANKS A LOT Veena. That resolve the problem, and enable me to build the code.