Hi Champ,
I am asking for my customer about the questions in CLA.
1. The GPIO could be configured which core (C28/CLA) is the master which means one of the core has the access to control the GPIO. How about the core which isn't able to control the pin, would it be able to get the status of the GPIO pin ? Would it be the same result for both C28 and CLA ?
2. If taking Task 8 as the background task, would it still be able to launch a CLA interrupt to C28 for Task 8, or it merely runs continuously as a while loop in CLA ?
3. Customer found out the code running in CLA, after compiled, the code size was far beyond expectation larger (more than x5). How could it be possible and how to thin the code size in CLA ? (using --opt_level 2, and --opt_for_speed to 0 which the code size is the most concern)
Thanks for the reply,
Regards.