Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE
Hi,
I am using a dual core code with both CPUs along with CPU1.CLA1. I am using SOFTWARE trigger for INT 1. Just a a trial, I was trying to toggle GPIO16 through CPU1.CLA1. The main parts of the program is written below.
void main()
{
DINT; // Interrupt masking
//$$$$$$$$$$$$$$ Master CPU initializations $$$$$$$$$$$$$$$$$$$$$$$$$
InitSysCtrl(); // System Initialisation
InitPwm(); // Initialise PWM
InitAdc(); // Initialise ADC
Gpio_Init(); //Initialize GPIO 16. Ownership for CPU1.cla1
EALLOW;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable EPIE block
PieVectTable.ADCA1_INT = &adca1_isr; // directs Adc ISR to vector table
PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // ADC interrupt is 1.1
IER |=1; // Enable first group
EINT; //Remove interrupt masking
//$$$$$$$$$$$$$$ Clearing Interrupt Flag registers of CLA1 $$$$$$$$$$$$$$$$$$$$$$$$$
CpuSysRegs.PCLKCR3.all=1;
Cla1Regs.MICLR.all = 0xFF; // clear all old interrupt flags
Cla1Regs.MICLROVF.all = 0xFF; // clear old Overflow flags
//$$$$$$$$$$$$$$ RAM Allotment between CPU 1, CPU 2 and CPU1.CLA1 $$$$$$$$$$$$$$$$$$$$$$$$$
//Cla1Regs.MCTL.bit.SOFTRESET = 1; //FOR LEVEL TRANSITION OF INT SOURCE
MemCfgRegs.GSxMSEL.bit.MSEL_GS0 = 1; //CPU2 is the master of GSO RAM
MemCfgRegs.GSxMSEL.bit.MSEL_GS1 = 0; //CPU1 is the master of GS1 RAM
//Configure LS0,LS1,LS2 and LS3 as program memory for CLA
MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS2 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS2 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS3 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS3 = 1;
// Next configure LS4RAM as data space for the CLA
// First configure the CLA to be the master for LS0(1) and then
// set the spaces to be code blocks
MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 0;
//$$$$$$$$$$$$$$ CLA Interrupt Settings $$$$$$$$$$$$$$$$$$$$$$$$$
DmaClaSrcSelRegs.CLA1TASKSRCSEL1.bit.TASK1=0; //Select Software Trigger for task 1
Cla1Regs.MVECT1 = (uint16_t)(&Cla1Task1); //MVECT1 Loaded with address of Cla1Task1
EDIS;
while(1);
}
__interrupt void cla1Isr1 ()
{
//
// Acknowledge the end-of-task interrupt for task 1
//
PieCtrlRegs.PIEACK.all = M_INT11;
//
// Uncomment to halt debugger and stop here
//
// asm(" ESTOP0");
}
#include <stdint.h>
extern int SA[13],SB[13],SC[13],SAcomp[13],SBcomp[13],SCcomp[13],S1[13];
#include "F28x_Project.h"
extern int q;
__interrupt void Cla1Task1 ( void ); //Cla1Task1
__interrupt void Cla1Task1 () //Cla1Task1
{
__mdebugstop();
SA[0]=S1[0];
GpioDataRegs.GPATOGGLE.bit.GPIO16=1;
//Cla1Regs.MCTL.bit.SOFTRESET = 1;
Cla1Regs.MIRUN.bit.INT1=0;
//GPIO_togglePin(16);
}
ADC ISR
interrupt void adca1_isr(void)
{
EALLOW;
Cla1Regs.MIFRC.bit.INT1 =1;
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear interrupt flag in ADC A
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear interrupt flag in ADC B
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear interrupt flag in ADC C
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt group
EDIS;
}
I am using software trigger for CLA from ADC isr. I see that The MIFRC.int1 bit is not becoming 1 even if I force it through adcisr1. The execution is not reaching the MDEBUGSTOP command also.
Please help.
