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TMS320F28388D: Questions about adc_ex6_soc_continuous_dma routine

Katherine Wang
Intellectual 2210 points
Part Number: TMS320F28388D


Hi Team,

Question 1

As shown in the figures above, the maximum sampling clock of the ADC unit is 50MHz. The system clock of the project is 200MHz, but ADCCLK = (input clock) / 2.0 configures the sampling clock of ADCC as 100MHz. Is this incorrect?

The picture above shows the ADC trigger mode of the adc_ex6_soc_continuous_dma project of 28379D that I analyzed, which does not enable ADCINT1 to trigger SOC0, but the adc_ex6_soc_continuous_dma project of 28388D in this post enables ADCINT1 to trigger SOC0, as shown in the figures below.

If it's configurated like this, I think the triggering process will be as follows.

That is to say, SOC0 is converted one more time in each cycle. Compared with the routine of 28379, there should be a problem, right?

The notes of void setupADCContinuous(uint32_t adcBase, uint16_t channel) function of 28379 clearly indicates that ADCINT1 triggers SOC1~SOC15. Could you please compare this routine of the two processors?

Kind regards,

Katherine

  • 0
    TI__Mastermind 38830 points

    Hi Katherine,

    Katherine Wang said:
    As shown in the figures above, the maximum sampling clock of the ADC unit is 50MHz. The system clock of the project is 200MHz, but ADCCLK = (input clock) / 2.0 configures the sampling clock of ADCC as 100MHz. Is this incorrect?

    Yes, your assumption is correct however the maximum ADC speed for 2838x and 2837x is 50MHz.  With 200MHz device clock, the ADC prescaler should be set to div by 4 to produce 50MHz ADC clock.

    Katherine Wang said:
    That is to say, SOC0 is converted one more time in each cycle. Compared with the routine of 28379, there should be a problem, right?

    No, SOC0 will only be converted once.  The end of SOC15 generates  ADCINT2, which in turn triggers conversion for SOC0 in F2838x.  In F2837x, SOC0 is triggered by EPM SOC.  In both examples, SOC0 is converted once.

    Regards,

    Joseph

  • 0
    TI__Intellectual 2210 points

    Hello Joseph,

    Thank you for confirming Question 1 for me.

    But for question 2, I still think that the 28388 routine SOC0 will be triggered one more time.

    There is no problem with "The end of SOC15 generates  ADCINT2, which in turn triggers conversion for SOC0 in F2838x" in your reply.

    Step 1. SOC15 ends and ADCINT2is generated.

    Step 2. ADCINT2 will trigger SOC0, and the relevant code is in the initialization process, as shown in the figure below.

    When SOC0 ends, ADCINT1 will be triggered, and the configuration is shown in the figure below.

    Next, for the 28388 routine, ADCINT1 will trigger 16 interruptions from SOC0 to SOC15. Thus, I still think that SOC0 will be converted one more time, because in step 2, it has been converted once.

    Furthermore, in this picture I drew:

    Will there be any conflict between the ADCINT1 generated by the end of SOC0 of Cycle2 and the ADCINT2 generated by SOC15? I'm still not very clear about why the SOC0 of the 28388 routine should be configured to be triggered by ADCINT1.

    While for the configuration of SOC0, the routine of 28379 is different. ADCINT1 will not trigger SOC0.

    Kind regards,

    Katherine

  • 0 in reply to Katherine Wang
    TI__Mastermind 38830 points

    Hi Katherine,

    No, there won't be any conflict of having two consecutive SOC0 being converted soon as ADCINT1 is generated by EOC0.  This is because of the round robin setting called in F28388 ADC_init() setup.  The round robin priority setting is set such that SOC0 gets first priority then followed by the next SOC# and so on until SOC15.

    Regards,

    Joseph