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TMS320F28377D: Overflow detection for CLA end-of-task interrupt

Mike Twieg1
Intellectual 390 points
Part Number: TMS320F28377D

Hello,

In my application, I'm using the end of a CLA1 task to trigger an interrupt on CPU1 (group 11, channel 1 in the PIE). For verification purposes, I need to be able to detect if the CPU ISR is finished before the next CLA task finishes. However I'm not seeing any convenient way to accomplish this. Some peripheral interrupt sources, like the ePWMs and ADCs, have interrupt overflow flags, but there doesn't seem to be anything like that for the CLA-generated interrupts.

One idea I had was to check the state of PieCtrlRegs.PIEACK.bit.ACK11 at the end of the CLA task. The last thing the CPU does in its ISR (before all the compiler-generated return stuff) is clear the ACK bit for that group, so if the ACK bit is still set when the CLA task ends, then that would indicate an overflow will occur. However this would require that the CLA read the ACK bit, and I don't believe the CLA has access to the PIE registers. I guess I could create a "dummy" ACK bit in the ClaToCpu RAM which the CLA could then access.

But either way, this is a somewhat indirect method, since the reading and setting of these bits don't exactly correspond to the state of the PIE itself, due to software overhead (which is compiler-dependent). Not great as a verification tool.

Any other suggestions? Maybe the CLB could be leveraged somehow?

Regards,

Mike

  • 0
    TI__Mastermind 23140 points

    Hi Mike,

    Our subject matter expert is currently out of office and will get back to you tomorrow.

  • 0 in reply to Luke Jones
    TI__Mastermind 32345 points

    Hi Mike,

    Apologies for the delay. Using the ACK register check method, one disadvantage I see is the ACK can be set by interrupt within that PIE group, not necessarily due to CLA interrupt. So, there are chances all false indication. A better solution would be to use a shared variable set at the end of ISR and the CLA task waiting for this variable.

    In newer C2000 devices there is a module named ERAD. Using this, it should be possible to count the occurrences of the CLA interrupt event while executing the CLA ISR (count should be 0 in an ideal scenario)

    Regards,

    Veena