TMS320F28054F: Flash API use to TMS320F28054F motorware application SW

Hi Seol,

Our team will review this and get back to you in a day or two.  Thank you.

Regards,

Vamsi

Seol,

Has the customer performed the memcpy function call to copy the flash contents to RAM before this function?  I'm thinking that in the linker they may have defined the code past a certain point to load to flash but run from RAM.  If the code jumps to RAM before the memcopy then it will trap out.

Another thing is I would make sure the watchdog is either reset per the required spec or disabled(for debug they could just disable it for now) to be sure that is not tripping.

Best,

Matthew

Hi Matthew,

Flash memory program was implemented by referring to Flash2805x_API_Quickstart.pdf

So call to a memory copy routine and function has also been set.

[F28054F.cmd file]

[main.c, main function]

Also, watchdog and interrupt were disabled before flash_program() was executed.

Hong,

Let me ask some others to take a look at the post, to see if this could be motorware specific.

Best,

Matthew

Hong,

Can you share the full .cmd file?  Since this is "F" version we need to keep out of 0x8000-0x8800 with user code since that is reserved for motorware functions.

Best,

Matthew

Hi Matthew,

The .CMD file in use is shown below.

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   RAML1_L3			: origin = 0x008800, length = 0x001800		/* on-chip RAM block L1~L3 */
   FLASHJ			: origin = 0x3E8000, length = 0x001000		/* on-chip FLASH */
   FLASHI			: origin = 0x3E9000, length = 0x001000		/* on-chip FLASH */
   FLASHH			: origin = 0x3EA000, length = 0x002000		/* on-chip FLASH */
   FLASHG			: origin = 0x3EC000, length = 0x001FFE		/* on-chip FLASH */
/*   FLASHF			: origin = 0x3EE000, length = 0x002000		/* on-chip FLASH */
/*   FLASHE			: origin = 0x3F0000, length = 0x002000		/* on-chip FLASH */
/*   FLASHD			: origin = 0x3F2000, length = 0x002000		/* on-chip FLASH */
   FLASHC_F			: origin = 0x3EE000, length = 0x008000		/* on-chip FLASH */
   FLASHA			: origin = 0x3F7000, length = 0x000FFE		/* on-chip FLASH */
//   BEGIN			: origin = 0x3F7FFE, length = 0x000002		/* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   BEGIN			: origin = 0x3EDFFE, length = 0x000002		/* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   
   Z1_SCC_ROM		: origin = 0x3F8000, length = 0x000400		/* Zone 1 Safe-Copy Code Secure ROM */
   Z2_SCC_ROM		: origin = 0x3F8400, length = 0x000400		/* Zone 2 Safe-Copy Code Secure ROM */ 
   Z1_SECURE_ROM	: origin = 0x3F8808, length = 0x0044F8		/* Z1 Secure ROM */
   
   IQTABLES   		: origin = 0x3FDB52, length = 0x000b50  /* IQ Math Tables in Boot ROM */
   IQTABLES2  		: origin = 0x3FE6A2, length = 0x00008C  /* IQ Math Tables in Boot ROM */
   IQTABLES3  		: origin = 0x3FE72E, length = 0x0000AA  /* IQ Math Tables in Boot ROM */


   DCSM_OTP_Z2_P0	: origin = 0x3D7800, length = 0x000004		/* Part of Z1 OTP.  LinkPointer/JTAG lock/ Boot Mode */
   DCSM_OTP_Z1_P0	: origin = 0x3D7A00, length = 0x000006		/* Part of Z2 OTP.  LinkPointer/JTAG lock */
   
   /* DCSM Z1 Zone Select Contents and Reserved Locations (!!Movable!!) */
   /* Z1_DCSM_RSVD must be programmed to all 0x0000 and must immediately follow Z1 Zone Select block */
   DCSM_ZSEL_Z1_P0	: origin = 0x3D7A10, length = 0x000010		/* Part of Z1 OTP.  Z1 password locations / Flash and RAM partitioning */
   Z1_DCSM_RSVD     : origin = 0x3D7A20, length = 0x0001E0	    /* Part of Z1 OTP.  Program with all 0x0000 when Z1 DCSM is in use. */
   
   /* DCSM Z1 Zone Select Contents and Reserved Locations (!!Movable!!) */
   /* Z2_DCSM_RSVD must be programmed to all 0x0000 and must immediately follow Z2 Zone Select block */
   DCSM_ZSEL_Z2_P0	: origin = 0x3D7810, length = 0x000010		/* Part of Z2 OTP.  Z2 password locations / Flash and RAM partitioning  */
   Z2_DCSM_RSVD     : origin = 0x3D7820, length = 0x0001E0		/* Program with all 0x0000 when Z2 DCSM is in use. */
   
   ROM				: origin = 0x3FF27C, length = 0x000D44		/* Boot ROM */
   RESET			: origin = 0x3FFFC0, length = 0x000002		/* part of boot ROM  */
   VECTORS			: origin = 0x3FFFC2, length = 0x00003E		/* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   BOOT_RSVD		: origin = 0x000000, length = 0x000050		/* Part of M0, BOOT rom will use this for stack */
   RAMM0			: origin = 0x000050, length = 0x0003B0		/* on-chip RAM block M0 */
   RAMM1			: origin = 0x000400, length = 0x000400		/* on-chip RAM block M1 */
   //RAML3			: origin = 0x009000, length = 0x001000		/* on-chip RAM block L3 */
   FLASHB			: origin = 0x3F6000, length = 0x001000		/* on-chip FLASH */

}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{
   /* Allocate program areas: */
   .cinit			: > FLASHC_F			PAGE = 0
   .pinit			: > FLASHC_F,			PAGE = 0
   .text			: > FLASHC_F			PAGE = 0
   codestart		: > BEGIN				PAGE = 0

   ramfuncs            : LOAD = FLASHH,
                         RUN = RAML1_L3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   dcsm_otp_z1		: > DCSM_OTP_Z1_P0		PAGE = 0
   dcsm_otp_z2		: > DCSM_OTP_Z2_P0		PAGE = 0
   
   dcsm_zsel_z1		: > DCSM_ZSEL_Z1_P0		PAGE = 0
   dcsm_rsvd_z1		: > Z1_DCSM_RSVD		PAGE = 0
   dcsm_zsel_z2		: > DCSM_ZSEL_Z2_P0		PAGE = 0
   dcsm_rsvd_z2		: > Z2_DCSM_RSVD		PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack			: > RAMM0				PAGE = 1
   .ebss			: > RAML1_L3			PAGE = 0
   .esysmem			: > RAML1_L3			PAGE = 0

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst			: > FLASHC_F			PAGE = 0
   .switch			: > FLASHC_F			PAGE = 0

   /* Allocate IQ math areas: */
   IQmath			: > FLASHC_F			PAGE = 0            /* Math Code */
   IQmathTables		: > IQTABLES,			PAGE = 0, TYPE = NOLOAD

  /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2	: > IQTABLES2,			PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
    /* Uncomment the section below if calling the IQNasin() or IQasin()
       functions from the IQMath.lib library in order to utilize the
       relevant IQ Math table in Boot ROM (This saves space and Boot ROM
       is 1 wait-state). If this section is not uncommented, IQmathTables2
       will be loaded into other memory (SARAM, Flash, etc.) and will take
       up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables3	: > IQTABLES3,			PAGE = 0, TYPE = NOLOAD
    {

               IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

    }
    */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset			: > RESET,				PAGE = 0, TYPE = DSECT
   vectors			: > VECTORS				PAGE = 0, TYPE = DSECT

}

The memory area you talked about is not used.

I was able to solve it after testing again through Example_Flash2805x_API example.

I solved it by adding the F2805x_GlobalVariableDefs.c and F2805x_Device.h header files included in the example to the existing project.

However, the register file declaration defined in the existing source in the added file must be commented out.

Afterwards, it was possible to access the Flash memory without any problems after execution as in the example code.

Thanks for your help in solving the problem.

Regards,

Seol

Hong,

Thanks for your update on the status and glad you have resolved the issue. 

I would have thought the compiler would have flagged a error/warning for these file dependencies.  Does the quickstart guide need to be updated to mention adding these files?

Best,

Matthew

Hi Matthew,

Only the variable definition is specified in the Flash2805x_API_Quickstart.pdf file, and there is no content on whether or not to add the file.

Therefore, I hope that it will be helpful for other engineers to use the API by updating the details, such as adding the corresponding file.

Regards,

Seol