LAUNCHXL-F28379D: CAN Rx FIFO Clarification

Matthew,

              I will research your question. In the interim, have you looked at the erratum titled “During DCAN FIFO Mode, Received Messages May be Placed Out of Order in the FIFO Buffer” in www.ti.com/lit/SPRZ412?

Yes I have read it, although it doesn't explain very much

Matthew,

    I need to research this a bit. Will respond by early next week.

Thank you for looking into it!

I appreciate your help.

- Matthew

Matthew,

   I have reached out to our Design team and am awaiting a response.

Thank you Hareesh.

In the meantime, I have another question.

Below is a screenshot of how I am creating a 31-element FIFO for receiving CAN messages.

Notice that I include the CAN_MSG_OBJ_FIFO flag inside the for loop which clears the EoB bit for message objects 2-31. Is that correct?

And I omit the CAN_MSG_OBJ_FIFO flag for the last message object (ID 32, outside the for loop) which sets the EoB bit. Is that correct?

Is this a typical way of setting the EoB bit within a FIFO? Will my implementation work as I expect? I just need verification because there is no obvious way to visualize the FIFO.

Thank you!

- Matthew

Matthew,

              I believe I found the answer for your first question in the TRM. Take a look at this note found on page 2481 of www.ti.com/lit/SPRUHM8. All message objects of a FIFO buffer needs to be read and cleared before the next batch of messages can be stored. Otherwise true FIFO functionality cannot be guaranteed, since the message objects of a partly read buffer will be re-filled according to the normal (descending) priority. The highlighted line indicates that the new message will be stored in Message Object 2 (in your case).

Thank you Hareesh!

Now I understand the erratum.

I will adjust my routine accordingly. Also, is there any way to move CAN message data from one FIFO object to another? For example, after processing object 2 (clearing NewDat bit) is there a way to shift the remaining messages in the FIFO to the left so true FIFO functionality is achieved?

Thank you again for your excellent support. And thank you for getting back to me! A+

- Matthew

In regards to the EoB bit, following your suggestion, I watched the CAN_IF1MCTL (EoB bit) and CAN_IF1CMD (MSG_NUM bit) registers and I verified that the EoB bit for each message object is being set as I intend. Thanks again for your help with that.

- Matthew