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TMS320F28379D: HPI/LPI interrupts

Mojo
Expert 1570 points
Part Number: TMS320F28379D


Hi,

we're doing fast control systems. The control interrupt is based of EOC of an ADC, triggered by some PWM (very conventional).

I came across this pragma (from spru514y, section 6.9.15):

#pragma INTERRUPT ( func , {HPI|LPI} )

I couldn't find any documentation, and very little discussion about this subject.

so a few questions:

1. can I use the ADC interrupt as HPI?

2. what's the performance increase when using HPI?

3. In the same section of the pragma, it mentions the FPU. What's the connection between FPU and interrupts?

thanks a lot!

  • 0
    TI__Mastermind 30185 points

    Hello Ari,

    I can address the third question. I looked through the floating-point unit and instruction set document and found that there is an interrupt enable and interrupt flag register, so this may be how there is a connection (see Table 2-1. 28x Plus Floating-Point CPU Register Summary). The document also mentions that the C28x+FPU vectors are identical to those on the C28x CPU. If you look at the reference manual for the F28379D, the PIE channel mapping table has an FPU_OVERFLOW and FPU_UNDERFLOW interrupt that can be used, which I'm fairly certain is what the specific FPU interrupts would be here (see PIE Channel Mapping section 3.4.5).

    The section within the SPRU514 document that you mentioned states how to declare whether an interrupt on the FPU is high or low priority, and the FPU Instruction Set document contains details for how each type of interrupt will affect what you need to do in your code, mainly that "A high priority interrupt is defined as an interrupt that cannot itself be interrupted. In a high priority interrupt, the RB register must be saved if a RPTB block is used within the interrupt."

    For other questions, I will try to reassign this to other experts.

    Best regards,

    Omer Amir

  • 0 in reply to Omer Amir
    TI__Mastermind 28220 points

    Hello Ari,

    Our HPI expert is out of office for the holiday and will return the first week of January to assist with your question.

    Thank you,

    Luke

  • +1 in reply to Luke Jones
    TI__Guru* 81560 points

    Ari,

    Assuming you have enabled the fpu in the build options(should be the default on this device), then this will make a difference in ALL your ISRs. 

    Essentially if you are not nesting ISRs, i.e. inside an ISR re-enabling the global INTM/ PIE, then you can take advantage of the HPI attribute.

    You can either use the pragma, or the attribute setting that is shown in that same paragraph you mentioned earlier:

    Essentially we are telling the compiler that we won't nest inside the HPI so it doesn't have to worry about context saving as much before starting the actual ISR code.  Below is a quick snapshot of the disassembly with HPI and LPI(default if you do nothing) settings; looks like at least 5 CPU cycles of savings not accounting for any memory delays, etc.

    LPI/Default context save

    HPI context save

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Expert 1570 points

    Thanks Matthew!

    Now it's clear.

    Worth adding your explanation to where the pragma is introduced (spru514y, section 6.9.15).