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TMS320F28377D: The EMIF problem

Part Number: TMS320F28377D


Hi all:

    In my project, I want CPU1 and CPU2 can share the EMIF1 bus. In this case, I think a Arbitration function should be needed. The questions are below:

    1. Are there any EMIF registers can show up which CPU occupy the emif1 bus?

    2. Is it true that CPU1 and CPU2 can not access the emif1 bus simultaneously?

    3. Is there any demo code of Arbitration function?

Best Wish

Li

  • One more question:

    4. If I use dma to transmit data from MRAM(external emif) to RAM, during this transportation, if DMA takes value from MRAM, will it occupy emif bus?

  • 1. Are there any EMIF registers can show up which CPU occupy the emif1 bus?

    I presume you are asking if there is a register that indicates which CPU has control over EMIF1. EMIF1MSEL Register provides this information.

        2. Is it true that CPU1 and CPU2 can not access the emif1 bus simultaneously?

    Correct. At any time only one CPU has ownership.

        3. Is there any demo code of Arbitration function?

    The question of arbitration does not arise, since there is only one CPU controlling at any time.

    4. If I use dma to transmit data from MRAM(external emif) to RAM, during this transportation, if DMA takes value from MRAM, will it occupy emif bus?

    Yes.