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ADC continuous run

Other Parts Discussed in Thread: TMS320F28335

 Hi all,

  This is Hari Prasad.P

  We are using TMS320f28335 controller. In that for ADC sampling we are using Continuous sampling mode. But in the data sheet he mentioned that while using ADC in continuous sampling mode some care has to be taken to read the results from the result register.

 My question is what type of care should we take to read theADC result register without corrupting the data?

  Is there any problem if we are using ADC in continuous sampling mode?

 If any body know the answer please inform me. Thanks in advance.

 

Regards

Hari prasad.P

09642254555

India

  • Hari,

    Warning is only meant in terms of keeping up with the ADC results as they are updated/overwritten by the ADC in continuous mode.  There are no contention issues with reading the registers async, the logic takes care that the values are valid.  Caution comes from that the value read(if async) might be sample n or sample n+1 in time. 

    Since there is effectively a 16 stage FIFO in cascaded mode, if the data is not read in time it will be overwritten by the next conversion in that slot.  Since you are using the 28335 I believe you can use the DMA to transfer data directly from the ADC to RAM avoiding any CPU overhead for the ISR/transfer.  This should be sufficient to avoid any problems like the above, if that is a concern.

     

    Matt

  • Dear Sir,

     I am very much thankful to  you for giving your  valuable suggession by spending some valuable time of yours on my problem.

       I have another question regarding ADC. That is

       We have totally 3 interrupts for ADC. Those are ADCISR,   SEQ1 ISR,   SEQ2ISR.   My question is what is the use of ADC ISR? because we are having two SEQ ISRs for two sequencers  independently  that is if we use adc in dual sequencer mode we can generate the interrupts for two sequencers independently by using SEQ1 and SEQ2 interrupts and    if we want to use ADC in cascaded mode we can generate the interrupt for ADC in cascaded mode using SEQ1 Isr itself.

            Please give your valuable answer for my question. Because though i am using ADC i am unable find  the answer for my question.

                                                                                                      Thank you Sir,

                                                                                                                                                                                                                                              Regards

                                                                                                                                                                                                                                          Hari Prasad.P

  • Hari,

    This is a legacy interrupt from the F281x device, that is the logical OR of SEQ1 and SEQ2.  This was left on the 2833x for legacy reason for those migrating code from 281x to this platform.  If you have new design with no tie to the F281x you do not need to use the ADCISR at all.

    Best,

    Matthew

  • Thank u sir for ur valuable reply.

                Here i have a doubt   :-

    if i configure ADC in continuous run mode after conversion, while results are updating  into the registers at the same time if we read the result registers  is there any possibility to get invalid data?

     Is there any gain errors (or ) Offset errors in the TMS320F28335 ADC module  even though if we design the board properly in the controller point of View.? In Data sheet mentioned that +/-15LSB. But that is large value with respect to maximum value.

     Thanks and Regards

    Hari Prasad.P

  • Hari,

    It is not possible to get invalid data from the result registers.  The HW handles this arbitration and will hold off the read until the write completes if there is a collision. 

    The gain and offset errors are consistent with the max/min published in the DS.  Keep in mind these are max over voltage and temp range of the device.  Worst case gain error occurs at full scale; worst case offset is static across the transfer function.

    TI provides a way to remove the offset error with the use of the OFFTRIM register/field within the ADC.  Details on how to use this are captures in the ADC UG.

    For gain, if your input range is not 3V and/or your max/min temperature fall below the max ratings of the device this number will be lower.  For example, let us assume we have a device with gain error of 15LSBs at 3V input.  For 1.5V input this would only be 8LSBs, etc.  Furthermore on this device the 15LSBs would occur not only at 3V but also at max temp(125C).  So if you temp is less gain error will be less.

    Also, keep in mind these are absolute max for ALL devices, not necessarily the max that is seen on every device(it could be lower).

    Best,

    Matthew

  •  

    Thank you Sir,

            Here we thought that we are facing some problem with SCI. The problem is

     we have written some application software to sent the data from PC through SCI. It is working fine. But some times we are gettiing wrong pulses while we are sending the data.

    Is there any problem with SCI pins on EPWM pheripheral if we continuously send the data through SCI?

     

    Please clarify it as early as possible.

           Thanks in advance...

    P.Hari Prasad