Hello,
I read in few datasheet that TIMER2 could be used to measure the XTAL (external clock 20MHz) drift.
I would really like to implement this integrity check due to the criticality of this XTAL drift in our design.
I cannot find a lot of design reference or example on this topic.
Can someone explain to me how it works and how to configure it?
I imagine that I would use XTAL as a input clock for TIMER2 and that SYSCLK (PLL) would be the High frequency sampling clock.
But I don't know how it works internally and how to configure it. I would imagine that if XTAL drift then SYSCLK (PLL) would drift as well!
Thank you