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TMS320F28377S: AD sampling fault

Part Number: TMS320F28377S

Hi Team,

Here are some issues from the customer may need your help:

ADC configurations:

(This is the configurations that after fixed issue 2.)

EPWM configurations:

EPWM1 ISR:

EPWM2 ISR:

issue:

1. The relevant ADC sampling value will appear issue shown below during EPWM2 interrupt:

(The value in AdcaResultRegs.ADCRESULT2 mutated to 0.)

2. The green waveform represent the value of AdcaResultRegs.ADCRESULT7. The sampling is selected by emulation switch from 2 sampling channels. The sampling is not coupled after exchange AdcaResultRegs.ADCRESULT0 and AdcaResultRegs.ADCRESULT7. It seems like the channels of Group A are influenced by the conversion time. The conclusion from the customer is that more important sampling should be configured as former as possible. So he'd like to know are there any cautions about it?

--

Thanks & Regards,

Yale Li

  • Hello Yale,

    The timing for the ADC should follow the device datasheet in the ADC Electrical Data and Timing section. For this device, there should be a minimum sample window of 320 ns, so if the customer is exceeding that there should not be a problem. This sample window is configured using the ACQPS and peripheral SYSCLK. I can't tell from the configurations you've posted, but assuming that the ADC clock has no prescaler and the ACQPS is the same for all SOCs as it is for SOC7, the sampling window should be about 3.3 us which is more than enough. However, keep in mind that the SOCs for 1 ADC instance (i.e. ADC A) cannot be triggered simultaneously so there will need to be some delay between triggering them.

    The conclusion from the customer is that more important sampling should be configured as former as possible. So he'd like to know are there any cautions about it?

    I'm not too sure what you mean, do you mean the sampling window should be smaller or the trigger should happen earlier for pins that you want to sample?

    Best regards,

    Omer Amir