TMS320F280039C: separate IVT table for Flash bootloader & Application code

Rahul Jathar

Prodigy 150 points

Part Number: TMS320F280039C

Hi All,

I am developing custom flash bootloader (FBL) for TMS320F280039C controller.

i have separate workspace for Bootloader & Application.

Bootloader starting Address is the starting Address of flash 0x00080000(Flash bank 0 address).

FBL size = 48KB

Application start address is 0x00090000 (Bank 1 start address)

Application size = 64KB.

There is shared memory for FBL & Application code.

Queries are bellows:

1. How can i assign separate Interrupt vector table (IVT) address for FBL & Application code?

2. What should be IVT address location for both workspaces so FBL code will jump to application code properly?

3. Where i can config IVT address for both workspaces?

over 2 years ago

0 Ibukun Olumuyiwa over 2 years ago

TI__Genius 11021 points

Hello Rahul,

I am referring this question to our ePIE module expert who can answer this question for you.

Best regards,
Ibukun

0 Vince over 2 years ago in reply to Ibukun Olumuyiwa

TI__Mastermind 19795 points

Hi Rahul,

Are you wanting two different address locations for the vector table? The only way to change where the absolute addresses are for the interrupt vector table is through the VMAP bit. See from the "TMS320C28x CPU and Instruction Set Reference Guide" below:

If you just want to remap all the ISRs (use different functions) when you start your application code, you can just re-register all the interrupts with the functions you desire at application time.

Regards,

Vince

0 Rahul Jathar over 2 years ago in reply to Vince

Prodigy 150 points

Hi Vince, Thanks for your reply. we can see below Image. I want to implement two different IVT for two different workspaces (Bootloader IVT & Application IVT).

0 Rahul Jathar over 2 years ago in reply to Ibukun Olumuyiwa

Prodigy 150 points

Hi Ibukun ,

Could you please help me regarding this query?

0 Vince over 2 years ago in reply to Rahul Jathar

TI__Mastermind 19795 points

Hi Rahul,

From the CPU core's PIE peripheral standpoint, I believe having two separate memory regions both mapped to the PIE CPU registers is not possible. Now, what is possible is to re-write out all the PIE vector addresses upon entering/exiting the bootloader, just like you would in the application code. But I don't believe they can be two separate register regions.

I will contact the Boot-ROM owners to provide some clarity on if it would be possible to do what you mentioned in the image.

Regards,

Vince

0 Baskaran Chidambaram over 2 years ago in reply to Vince

TI__Genius 17370 points

Vince's response above is accurate. I dont have anything else to add.

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TMS320F280039C: separate IVT table for Flash bootloader & Application code