I am running into an odd behavior using both CPU cores.
I am using CPU2 CLA task 1 to set EPWM1 duty, and DACA. CLA task1 is triggered by EPWM2. CPU2 has an empty for loop. CPU2 also has an ISR for processing the CLA task1 interrupt. All this does is clear the Group11 Ack Group. The CPU2 app works in a separate project, where both CPU1 and CPU2 are working correctly. I am trying to re-use the CPU2 part in a new project.
The new project is using CPU1 and CLA. CLA task 1 is triggered by ADCC, which is in-turn triggered by EPWM1. CPU1 also uses EPWM4 to trigger some computation. There is a separate ISR for EPWM4.
I have CPU1 do its initialization, then flag CPU2 to start its initialization. CPU1 waits for the IPC ack flag before proceeding.
While CPU1 is waiting for CPU2 to initialize, the ISR routine for EPWM4 is firing as expected.
As soon as CPU2 finishes initializing, EPWM4 stops and there is no ISR handling on CPU1. The app on CPU2 seems to be working as expected.
If I *pause* CPU2 in the debugger, EPWM4 starts again, and the CPU1 side looks to work correctly. If I un-pause CPU2, EPWM4 stops again.
CPU2 has ownership of EPWM1 to set the duty cycle. EPWM1 triggers ADCC1, which is owned by CPU1. I have found no other conflict for resource or memory.
Basically: CPU1:
Config GPIO
Config PWM, EPWM1, EPWM2, EPWM4, Config EPWM1 SOCA
Config ADC, Config ADCC1 to be triggered by EPWM1, ADCA1 to be triggered by EPWM4
Config DAC
Assign DACA to CPU2
Config CLA, Task1 triggered by ADCC1
enable interrupt for CLA Task 1
Assign EPWM1 and EPWM2 to CPU2
set IPC FLAG4
wait for ACK
enable Interrupts
ISR for EPWM4:
Set GPIO 14
Computation
Clear EPWM4 Int flag
Clear ACK GROUP3
Clear GPIO14
ISR for CLA Task 1:
Clear ACK GROUP11
CPU CLA Task1:
Set GPIO 27 for debug
Read ADC results
Do some computation
Set DACB for debug
Clear GPIO 27
On CPU2:
Device_init, Interrupt_initModule, Interrupt_initVectorTable
Wait for IPC Flag 4
setupDAC
setupCLA, Task 1, triggered by EPWM2
enable Interrupt for CLA Task 1
enable interrupts
Send ACK for Flag 4
CLA Task 1 ISR:
clear ACK for Group 11
CLA Task 1:
Set GPIO 95 for debug
Set EPWM1 duty
Set DACA
Clear EPWM2 interrupt flag (HWREGH(EPWM2_BASE + EPWM_O_ETCLR) |= EPWM_ETCLR_INT;)
Clear GPIO95
The CLA operation on CPU1 seems to work correctly when CPU2 is running. In other words, I see the GPIO toggling and DACB set correctly.
Do you see anything I am missing so far? Thanks!
