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TMS320F28379D: BOOTCTLR correct addresses and values for each CPU01/CPU02

Chris Yorkey
Genius 15975 points
Part Number: TMS320F28379D
Other Parts Discussed in Thread: SYSCONFIG, C2000WARE

C2000 Friends & Family,

We have some questions from our customer related to the BOOTCRL register for boot flashing CPU01/CPU02 within an F28379D dual core project.

The first question is related to the BOOTCTLR correct addresses and values for each CPU.  Since in the SPRUHM8I (technical reference manual, chapter 4) for CPU01 for a unprogrammed device will boot flash, but for CPU02 the situation looks different and probably a user would need to program the Z1-BOOTCTRL or Z2-BOOTCTRL zones for Flash boot.  This customer had tested code in their CPU02 files using our examples to the best of their ability as follow:

 2837x_FLASH_lnk_cpu2.cmd

 PAGE 0 :  /* Program Memory */

          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */

          /* BEGIN is used for the "boot to Flash" bootloader mode   */

..

    /* Dual Code Security Mode */

    DCSM_OTP_Z1_LINKPOINTER  : origin = 0x78000, length = 0x00000C  /* Z1 OTP.  LinkPointers */

    DCSM_OTP_Z1_PSWDLOCK     : origin = 0x78010, length = 0x000004  /* Z1 OTP.  PSWDLOCK/RESERVED */

    DCSM_OTP_Z1_CRCLOCK      : origin = 0x78014, length = 0x000004  /* Z1 OTP.  CRCLOCK/RESERVED */

    DCSM_OTP_Z1_BOOTCTRL     : origin = 0x7801C, length = 0x000004  /* Z1 OTP.  RESERVED/BOOTCTRL */

    DCSM_ZSEL_Z1_P0          : origin = 0x78020, length = 0x000010  /* Z1 OTP.  Z1 password locations / Flash and RAM partitioning - DCSM Z1 Zone Select Contents (!!Movable!!)*/

    DCSM_OTP_Z2_LINKPOINTER  : origin = 0x78200, length = 0x00000C  /* Z2 OTP.  LinkPointers */

    DCSM_OTP_Z2_GPREG        : origin = 0x7820C, length = 0x000004  /* Z2 OTP.  GPREG1/GPREG2 */

    DCSM_OTP_Z2_PSWDLOCK     : origin = 0x78210, length = 0x000004  /* Z2 OTP.  PSWDLOCK/RESERVED */

    DCSM_OTP_Z2_CRCLOCK      : origin = 0x78214, length = 0x000004  /* Z2 OTP.  CRCLOCK/RESERVED */

    DCSM_OTP_Z2_BOOTCTRL     : origin = 0x7821C, length = 0x000004  /* Z2 OTP.  GPREG3/BOOTCTRL */

    DCSM_ZSEL_Z2_P0          : origin = 0x78220, length = 0x000010  /* Z2 OTP.  Z2 password locations / Flash and RAM partitioning - DCSM Z1 Zone Select Contents (!!Movable!!) */

 

PAGE 1 : /* Data Memory */

         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

..

    /* Dual Code Security Mode */

    DCSM_Z1           : origin = 0x05F000, length = 0x000030  /* Zone 1 Dual code security module registers */

    DCSM_Z2           : origin = 0x05F040, length = 0x000030  /* Zone 2 Dual code security module registers */

    DCSM_COMMON       : origin = 0x05F070, length = 0x000010  /* Common Dual code security module registers */

    DCSM_Z1_OTP       : origin = 0x078000, length = 0x000020  /* Part of Z1 OTP.  LinkPointer/JTAG lock/ Boot Mode */

    DCSM_Z2_OTP       : origin = 0x078200, length = 0x000020  /* Part of Z2 OTP.  LinkPointer/JTAG lock */

 

SECTIONS

{

.

.

    /* Dual Code Security Mode Allocation */

    dcsm_otp_z1_linkpointer   : > DCSM_OTP_Z1_LINKPOINTER     PAGE = 0

    dcsm_otp_z1_pswdlock      : > DCSM_OTP_Z1_PSWDLOCK        PAGE = 0

    dcsm_otp_z1_crclock       : > DCSM_OTP_Z1_CRCLOCK         PAGE = 0

    dcsm_otp_z1_bootctrl      : > DCSM_OTP_Z1_BOOTCTRL        PAGE = 0

    dcsm_zsel_z1              : > DCSM_ZSEL_Z1_P0             PAGE = 0

 

    /* Dual Code Security Mode Allocation */

    dcsm_otp_z2_linkpointer   : > DCSM_OTP_Z2_LINKPOINTER     PAGE = 0

    dcsm_otp_z2_pswdlock      : > DCSM_OTP_Z2_PSWDLOCK        PAGE = 0

    dcsm_otp_z2_crclock       : > DCSM_OTP_Z2_CRCLOCK         PAGE = 0

    dcsm_otp_z2_bootctrl      : > DCSM_OTP_Z2_BOOTCTRL        PAGE = 0

    dcsm_zsel_z2              : > DCSM_ZSEL_Z2_P0             PAGE = 0

 

and the DCSM allocation in out DCSM_Z1_ZoneSelectBlock.asm have these values setup:

 

      .sect "dcsm_otp_z1_linkpointer"

    .long 0x1FFFFFFF     ;Z1-LINKPOINTER1

    .long 0xFFFFFFFF     ;Reserved

    .long 0x1FFFFFFF     ;Z1-LINKPOINTER2

    .long 0xFFFFFFFF     ;Reserved

    .long 0x1FFFFFFF     ;Z1-LINKPOINTER3

    .long 0xFFFFFFFF     ;Reserved

 

      .sect "dcsm_otp_z1_pswdlock"

    .long 0xFFFFFFFE     ;Z1-PSWDLOCK

    .long 0xFFFFFFFF     ;Reserved

 

      .sect "dcsm_otp_z1_crclock"

    .long 0xFFFFFFFF     ;Z1-CRCLOCK

    .long 0xFFFFFFFF     ;Reserved

 

      .sect "dcsm_otp_z1_bootctrl"

    .long 0xFFFFFFFF     ;Z1-GPREG3

    .long 0xFFFF0B5A     ;Z1-BOOTCTRL: BMODE = 0x0B (Flash Boot), KEY =0x5A

 

One question is if a user has to set the Z1-BOOTCTRL or Z2BOOTCTRL for CPU02 or do we have another route to avoid writing the Z1 or Z2 DCSM zones in CPU02 for booting it from flash. Because once programmed the DSCM will be unrecoverable and they would like to avoid that situation for development and production stages with firmware updates. The second question is if they can program the DSCM with binary 1’s and will be locked once a binary 0 will be set in the DSCM region, is it correct?

They tried to program the Z1-BOOTCTRL/Z2-BOOTCTRL using the On-Chip FLASH Tool in CCS 7, but the addresses look different from their linker files and the On-Chip FLASH, for example in On-Chip FLASH the OTPBOOTCTRL address is 0x7821E (32 bits) and in the linker file we are setting the address 0x7821C for Z2-BOOTCTRL register.

 We think maybe the address for Z2-BOOTCTRL register has to be 0x7821E deleting the long register Z2-GPREG3 but let us know what is preferable.

 Thanks for your help!

TY,

CY

  • 0
    TI__Mastermind 27750 points

    Hey CY,

    I am currently looking into this issue, I will get back to you before the end of the day.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    TI__Genius 15975 points

    Thank you Luke!  Appreciate your help !

    -Chris

  • +1 in reply to Chris Yorkey
    TI__Mastermind 27750 points

    Hi Chris,

    I believe the On-Chip Flash tool uses the correct address in this case for Z1/Z2 BOOTCTRL. I will confirm this with our other DCSM experts. Did this .cmd file come from a C2000Ware example? It seems the SysConfig DCSM tool also uses address 0X7821C for Z2-BOOTCTRL, we will fix this in the tool as well once I confirm the correct address.

    "We think maybe the address for Z2-BOOTCTRL register has to be 0x7821E deleting the long register Z2-GPREG3 but let us know what is preferable."

    I'm not sure I understand your question here, are you asking what is the best method to program Z2-BOOTCTRL without permanently programming other values in the Zone 2 Header? If so, the On-Chip flash tool is the preferred method in this case since you are able to program individual memory addresses at a time.

    Also, have you already programmed any security settings using either the .cmd file you provided or via the On-Chip Flash tool? If so, were you able to successfully boot CPU2 from Flash?

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    TI__Genius 15975 points

    Thanks Luke, the customer has access here too so let's indeed see what input they may provide, either on this thread or offline via email with me directly.

    Regards,

    Chris

  • 0 in reply to Chris Yorkey
    TI__Mastermind 27750 points

    Thanks Chris, let me know if your customer has any other questions.

    --Luke

  • 0 in reply to Luke Jones
    TI__Genius 15975 points

    Hi Luke, from our customer "thanks for the heads up! We implemented the comments in the CPU02 firmware and everything are looking good with our boot from FLASH feature with the two cores!"

    Much obliged!

    -Chris