I've been able to get McBSP to work from cpu1, but now I need to move it to cpu2. Upon doing this, I do not get a clock. I'm running in spi mode.
Both McBSP devices are assigned to cpu2 (from cpu1):
DevCfgRegs.CPUSEL9.all = 0x00000003;
ClkCfgRegs.LOSPCP.all = 2;
Clock enables in cpu2:
CpuSysRegs.PCLKCR11.bit.McBSP_A = 1;
CpuSysRegs.PCLKCR11.bit.McBSP_B = 1;
Gpio muxing in cpu1:
GpioCtrlRegs.GPACSEL1.bit.GPIO1 = 2;
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 3; //MFSRB
GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 3;
GpioCtrlRegs.GPACSEL1.bit.GPIO3 = 2;
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 3; //MCLKRB
GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;
GpioCtrlRegs.GPACSEL2.bit.GPIO14 = 2;
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3; //MCLKXB
GpioCtrlRegs.GPACSEL4.bit.GPIO25 = 2;
GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 3; //MDRB
GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3;
GpioCtrlRegs.GPACSEL4.bit.GPIO27 = 2;
GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 3; //MFSXB
Mcbspb setup in cpu2:
McbspbRegs.SPCR2.all=0x0000; // Reset FS generator, sample rate generator & transmitter
McbspbRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word, Digital loopback dis.
McbspbRegs.SPCR1.bit.DLB = 0;
McbspbRegs.PCR.all = 0x0F08; //(CLKXM=CLKRM=FSXM=FSRM= 1, FSXP = 1)
McbspbRegs.SPCR1.bit.CLKSTP = 2; // Together with CLKXP/CLKRP
// determines clocking scheme
McbspbRegs.PCR.bit.CLKXP = 0; // CPOL = 0, CPHA = 0 rising edge
// no delay
McbspbRegs.PCR.bit.CLKRP = 0;
McbspbRegs.PCR.bit.SCLKME = 0;
McbspbRegs.RCR2.bit.RDATDLY = 01; // FSX setup time 1 in master mode.
// 0 for slave mode (Receive)
McbspbRegs.XCR2.bit.XDATDLY = 01; // FSX setup time 1 in master mode.
// 0 for slave mode (Transmit)
McbspbRegs.RCR1.bit.RWDLEN1 = 2; // 16-bit word
McbspbRegs.XCR1.bit.XWDLEN1 = 2; // 16-bit word
McbspbRegs.SRGR2.all = 0x2000; // CLKSM=1, FPER = 1 CLKG periods
McbspbRegs.SRGR1.all = 0x000F; // Frame Width = 1 CLKG period,
// CLKGDV=16
McbspbRegs.SRGR2.bit.FPER = 15;
McbspbRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
for(us_temp= 0; us_temp< ( 1000 ); us_temp++);// Wait at least 2 SRG clock cycles
McbspbRegs.SPCR2.bit.XRST=1; // Release TX from Reset
McbspbRegs.SPCR1.bit.RRST=1; // Release RX from Reset
McbspbRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
McBSPb is only used for reception. Any idea why I do not see a clock? Neither error bit, RFULL nor RSYNCERR, are getting set.
Lee
