TMS320F28069: Why the HRCAP example for F2806x for Normal mode is not running as expected?

Hi Aditya,

Aditya Pahariya said:

1. HRCAP Example at location C:\ti\c2000\C2000Ware_4_02_00_00\device_support\f2806x\examples\c28\hrcap_capture_pwm is not running as expected, it is stopping at line 372; ESTOP0.

1. Let me confirm with another colleague of mine to see why these ESTOPs are here, I ran this example and after stepping through those ESTOP it runs good. However I will find a better explanation on why those are there.

Aditya Pahariya said:

2. How to get the time in seconds using the HCCAPCLK cycles count (HCCAPCNTRISE0 for Normal mode and PeriodWidthRise0 for High-resolution mode ), is dividing the count with HCCAPCLK frequency the correct way?

2. Yes, if you're using the HCCAPCLK cycles count, you will need to do HCCAPCLK * ( 1 / HCCAPFREQ)

Aditya Pahariya said:

3. SYSCLKOUT can be maximum 90MHz, and in High-resolution mode HRCAP_Cal() is needed with a frequency range of 98 to 120 MHz; so we cannot provide SYSCLK in High-resolution mode ?

3. HCCAPCLK can either be clocked by the system clock (SYSCLK), or the output of the PLL2 (PLL2CLK) before the divider is applied. 

Best regards,

Ryan Ma

Hi, Thank you for your response .

Regarding point number 3; in the data sheet for 06x; TMS320F2806x Real-Time Microcontrollers datasheet (Rev. J); Page 37 it is mentioned that SYSCLKOUT maximum value is 90MHz while in the example for 06x High-resolution mode at the Location; C:\ti\c2000\C2000Ware_4_02_00_00\device_support\f2806x\examples\c28\hrcap_capture_hrpwm in file; Example_2806xHRCap_Capture_HRPwm.c; Line number 274 it is mentioned that PLL2CLK should be between 98-120 MHz and the same is in the datasheet also.

So the question is; can we provide SYSCLKOUT to HCCAPCLK in High-resolution mode ( as we will need to do the calibration in HR mode )?

Hi Aditya,

I understand your question now, let me get back to you on this. I do not know the answer to this right away.

SYSCLKOUT has a max freq of 90MHz which you're correct. However HRCAP Clock has a min of 98Mhz and a max of 120Mhz according to our datasheet. I will need to follow up with someone here to see if you can still use SYSCLKOUT for HRCAPCLK. 

Best,

Ryan Ma

Hi Ryan ,

Thank you for your response. any updates on this?

Regards,

Aditya

Hi Aditya,

Sorry about the delay as I have not gotten an update yet on this. However I would use PLL2 for now as I verify this with another engineer.

Best,

Ryan MA

Hi,

Could u get any update on this ?

Regards,

Aditya

Hi Aditya,

Sorry I have not been able to give an update on this yet. I have pinged again on this subject to see if they can respond soon. I will update you as soon as I can get a response.

Best,

Ryan Ma