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TMS320F28035: EALLOW and EDIS in cpu_timer example

Part Number: TMS320F28035
Other Parts Discussed in Thread: CONTROLSUITE, C2000WARE

Hi,

I wanted to know if the use of EALLOW and EDIS instructions in cpu_timer2_isr and the use of EDIS in cpu_timer1_isr are needed in the example cpu_timer (controlSUITE/device_support/f2803x/v130/DSP2803x_examples_ccsv5/cpu_timer/Example_2803xCpuTimer.c). According to the TRM (and just by trying removing them), I think they are not needed.

Thanks in advance.

  • Roman,

    Yes, you are correct that those instructions are not needed for this specific use case.

    Here is a snippet about how to use the instructions EALLOW and EDIS from TMS320C28x CPU and Instruction Set (Rev. F) Section 2.4

    EALLOW — Emulation access enable bit. This bit, when set, enables access to emulation and other protected registers. Set this bit by using the EALLOW instruction and clear this bit by using the EDIS instruction. See the data sheet for a particular device to determine the registers that are protected. When the CPU services an interrupt, the current value of EALLOW is saved on the stack (when ST1 is saved on the stack), and then EALLOW is cleared. Therefore, at the start of an interrupt service routine (ISR), access to protected registers is disabled. If the ISR must access protected registers, it must include an EALLOW instruction. At the end of the ISR, EALLOW can be restored by the IRET instruction.

    I also strongly recommend you reference the examples provided in C2000Ware. These are the latest and up-to-date device support files and examples supported today.

    Regards,

    Ozino

  • Hi Ozino,

    Thank you very much for the answer. It clarified my doubt. By the way, I have downloaded a recent version of C2000Ware and it still has those instructions in the same example.

    Regards,

    Román

  • Hi Román,

    Glad to hear it. I've gone ahead and filed a ticket to the C2000Ware folks to get this looked at.

    Regards,

    Ozino