TMS320F28035: BuckBoostDir_F2803X

Can you clarify if you are running the code with OPEN_LOOP = 0? If OPEN_LOOP=1, then the compensator will be disabled and you need to control the duty cycle directly. 

Hi Gus,

I ran the code 'OPEN_LOOP = 0'. Does this routine have a preset maximum value of Duty and temperature protection?

As for the calculation of Duty, was 3p3z based on the value set by Gui_VoutSet or the value detected by Gui_Vout?

Regards,

Katherine

It does look like the code sets a maximum output value for the 3p3z DCL function to be 0.65. This can be seen in in the main.c file, line 1021 & 1031.

From the Gain_Worksheet that accompanies the project, it looks like the maximum duty was not meant to go above 0.55.

FYI, the user guide for the DCL libraries is located at:

C:\ti\controlSUITE\libs\app_libs\digital_power\f2802x_v3.5\Doc

Hi Gus,

In line 1124 of main.c there is protection for overvoltage.

How much is _IQ24(0.8) in decimal system?

That is, as there will be protection when VIN and VOUT are greater than a certain voltage, how much would that voltage be?

I'd like to know how _IQ would be converted to decimal value.

There is an operation to set _IQ24 in IQmathLib.h. _IQ24(0.8) = 0.8 * 16777216 = 13421772.8. Is it correct?

Regards,

Katherine

Hi Gus,

Thank you for your reply.

I still have one small query about the _IQ24 value of the overvoltage protection mentioned above.

Besides, I have a question about the setting of the output voltage. When I set the initial value of Gui_VoutSet too high (greater than 15V), the program will not work. If I set it to 15V at the beginning and then slowly increase it by 5V, the output voltage can be improved. If the voltage is increased by 10V at a time, the output voltage will return to 0 instantly. And the closer it is to the upper limit of the duty, the output can only be increased by 1V at a time. What is the cause for this issue?

Regards,

Katherine

Katherine,

Katherine Wang said:

How much is _IQ24(0.8) in decimal system?

This is still 0.8. The IQ math library only represents the decimal value in fix-point format for the CPU to be able to do the floating point calculation. The nn in IQnn only refers to the number of binary bits used to represent the decimal number. More information on this here, if you are interested:

C:\ti\c2000\C2000Ware_4_03_00_00\libraries\math\IQmath\c28\docs\IQmath_Quickstart.pdf

Katherine Wang said:

That is, as there will be protection when VIN and VOUT are greater than a certain voltage, how much would that voltage be?

The code could be better commented (I didn't write it, btw), but I believe the Vout_Read max value can be interpreted as 0.8 * VOUT_MAX_SENSE, which is defined as 110.22V. This means the code will turn off the PWMs if the voltage exceeds 88V. The hardware (resistor dividers feeding the ADC measuring VOUT) was likely designed such that the 12-bit ADC would output a max code of 4096 when 110.22V were applied on VOUT. 

Further evidence of this can be seen from your original screenshot. When you set Gui_VoutSet = 30, the Vout_Ref is set to 30/110..22 = ~0.2721.

Katherine,

I believe what is happening is that when you ask the software to go from 0 to 15V (for example), the compensator (CNTL_3P3Z in the diagram below) is overcompensating to get VOUT to 15V as fast as possible. This likely means, the duty is momentarily set higher that what is needed to reach 15V. It could be that momentary overcompensation is tripping the voltage overprotection or some other protection included in the software.

You can actually implement some type of soft start in the code. You'll have to add some check to in the software that calculates Gui_VoutSet-Gui_Vout and limits the difference to some delta value you specify, i.e. 1V. You can then keep raising the output voltage in 1V increments. You can run this in one of the slower background loops, maybe A1 where Gui_VoutSet is converted to Vout_Ref_DC.

//=================================================================================
//	A - TASKS
//=================================================================================
//--------------------------------------------------------
void A1(void) 
//--------------------------------------------------------
{
	
	// state ==1
	 Vout_Ref_DC=(long)(_IQ20mpy(Gui_VoutSet,VOUT_SENSE_MAX_INV))<<4;

Here is an example of how we do soft start in other projects.

slew = BUCK_vOutTarget_pu - BUCK_vOutSet_pu;

if(slew > BUCK_VOUT_SLEW_MAX_PU)
{
    BUCK_vOutSlewed_pu += BUCK_VOUT_SLEW_MAX_PU;
}
else if(slew < (0 - BUCK_VOUT_SLEW_MAX_PU))
{
    BUCK_vOutSlewed_pu -= BUCK_VOUT_SLEW_MAX_PU;
}
else
{
    BUCK_vOutSlewed_pu = BUCK_vOutTarget_pu;
}

Hi Gus,

I have added soft start to A1, and Vout_slew_max is set to 1.0. But I found that the problem that it didn't work well when the initial value of VoutSet was greater than 15V was still not resolved. Which part of the programming needs to be modified to tackle this problem?

Katherine,

There are a few issues with your code.

• Vout_slew_max needs to be cast to type (_iq20), you can do something like this:

#define Vout_slew_max _IQ20(1.0)

• Gui_Vout is defined as an _iq16 value, so you can't just subtract it from Gui_VoutSet (defined as an _iq20 value). I believe you can just shift Gui_Vout << 4 to convert it to _iq20.

slew = Gui_VoutSet - (Gui_Vout << 4);

• Finally, VoutSlewed_pu would replace Gui_VoutSet in line 933. Otherwise lines 914 to 930 have no effect. 

Vout_Ref_DC=(long)(_IQ20mpy(VoutSlewed_pu,VOUT_SENSE_MAX_INV))<<4;

Hi Gus,

Thanks for your reply.

Things improved after I modified the program above, but when I continued to increase the voltage, I still ran into the same problem,

For example, when I input 15V and Vout was set to 30V, the voltage would still return to zero.

Katherine,

Some things to try:

• Decrease the voltage step (Vout_slew_max) to slow down the ramp even more.
• Probe Vout or Iout or both to figure out if indeed this is the root cause of the issue.
• Adjust the compensator coefficients to make the compensator less aggressive (this is only if voltage/current ramp is really the issue). FYI, adjustment of the coefficients is beyond the scope of the support we can provide through E2E.

Gus,

1. I tried to gradually reduce the Vout_slew_max, even to 0.1, but this problem could still not be resolved. I found that the original program VouSet could output at 15V, but with the soft start, VoutSet was not able to output at 15V.

2. The following is the situation where I input 20V and the output was 0V and 15V respectively. I found that there seemed to be a problem with the value detected by my current. Ipv and Iout were negative values, and Iout was always -8.9.

3. Among them, I found that adjusting the upper limit of Duty could also determine whether there would be an output. Does this mean that when VoutSet is set too high, it will instantly exceed the upper limit of Duty and lead to no output?

If so, how should I limit to the value of Dutywith the help of the soft start?

4. If I want to change the compensation value of 3p3z, how should I adjust the coefficient value?

Katherine,

Katherine Wang said:

1. I tried to gradually reduce the Vout_slew_max, even to 0.1, but this problem could still not be resolved. I found that the original program VouSet could output at 15V, but with the soft start, VoutSet was not able to output at 15V.

There could still be some bug with the soft start code. You will need to debug this some more. I am not able to offer any solution/suggestion here without more debug information.

Katherine Wang said:

2. The following is the situation where I input 20V and the output was 0V and 15V respectively. I found that there seemed to be a problem with the value detected by my current. Ipv and Iout were negative values, and Iout was always -8.9.

This doesn't look right. Iout is read from ADCIN-A4. Have you looked at the output of the current sense op-amp on the board?

Katherine Wang said:

3. Among them, I found that adjusting the upper limit of Duty could also determine whether there would be an output. Does this mean that when VoutSet is set too high, it will instantly exceed the upper limit of Duty and lead to no output?

If so, how should I limit to the value of Dutywith the help of the soft start?

Can you clarify where you are making this adjustment? You shouldn't have to limit the duty value. The soft start will limit the gain step which will in turn limit the duty step.

Btw, have you checked if you are tripping this limit in the code? If you put a breakpoint here, does the code ever stop here?

// BackGroundISR with MPPT code
interrupt void BackGroundISR()
{

	//Protection for over voltage
	if(Vpv_Read>_IQ24(0.8) || Vout_Read>_IQ24(0.8))
	{
		EALLOW;
		EPwm1Regs.TZFRC.bit.OST=1;
		EPwm2Regs.TZFRC.bit.OST=1;
		EDIS;
	}

Katherine Wang said:

4. If I want to change the compensation value of 3p3z, how should I adjust the coefficient value?

At this point, it is not clear what the root cause of the issue, so modifying the compensator coefficients may end up not solving anything. 

Hi Gus,

Gus Martinez said:

There could still be some bug with the soft start code. You will need to debug this some more. I am not able to offer any solution/suggestion here without more debug information.

I set Vout_slew_max at 0.9. When inputting 15V, I can directly set VoutSet at 30V, but when inputting 25V, directly setting VoutSet at 30V will instantly increase Vout to about 23V and then it will gradually drop to 2~3V (not completely reset to zero). When Vout_slew_max drops from 1.0, 0.9.... to 0.1, Vout will still drop. When Vout_slew_max is less than 0.3, Vout will stop at 2~3V; then I input 25V when Vout_slew_max is set at 0.9~0.7, and VoutSet is set At 20V, Vout will directly rise to 23V and then gradually drop to 2~3V. Then I set Vout_slew_max to 0.6 and Vout can maintain at 20V.

Gus Martinez said:

This doesn't look right. Iout is read from ADCIN-A4. Have you looked at the output of the current sense op-amp on the board?

The voltages of ADC_A4 measured are listed as:

Vin  Vout   A4

25    15     0.146

25    20     0.146

25    15     0.145

15    20     0.145

15    25     0.145

In the case of changing the input and output voltages, the voltage of A4 is maintained at about 0.145V.

Gus Martinez said:

Can you clarify where you are making this adjustment?

I modified the value of Dmax_V. Originally, I set it to 0.65, I changed it to 0.85.

Gus Martinez said:

have you checked if you are tripping this limit in the code? If you put a breakpoint here, does the code ever stop here?

I observed the value of EPwm1Regs.TZFRC.bit.OST when Voutset was 30V and the output dropped. At this time, the value is 0, not 1; I put a breakpoint, and the code will not stop here.

Gus Martinez said:

At this point, it is not clear what the root cause of the issue, so modifying the compensator coefficients may end up not solving anything. 

At present, when my circuit is running the program, there will be a sound when the switch is switched. After adding a 220uF capacitor to the output, the sound will disappear. In addition to the above-mentioned over-compensation problem, I suspect that it may be a compensation problem.

Have you tried the test setup described in the user guide? Output voltage control with VIN=60V, 50Ohm load at Vout = 40, 55, 60, 65V? Just wondering if that works.

To tune the compensator I would recommend you use SFRA + compensation designer.

1. Build the code to run in OPEN_LOOP.

2. Setup your test environment as desired (VIN, Load).

3. Adjust the duty cycle manually until the desired Vout is reached.

4. Run SFRA to collect the plant data, save the data.

5. Load the plant data on compensator designer & tune the DC gain, poles, and zeros until the desired bandwidth, gain margin, and phase margin is reached.

6. Copy the new coefficients to the software.

7. Build the software in OPEN_LOOP = 0, with the new coefficients.

Please setup some time with me offline if needed.

Hi Gus,

Gus Martinez said:

Have you tried the test setup described in the user guide? Output voltage control with VIN=60V, 50Ohm load at Vout = 40, 55, 60, 65V?

I have tested the above voltages. The original program has no way to directly set VoutSet to a voltage above 40V. After setting the soft start, VoutSet can be directly set to 40V, but the voltage above 40V cannot be set.

Gus Martinez said:

3. Adjust the duty cycle manually until the desired Vout is reached.

I have manually adjusted the duty cycle in Open Loop, and found the same problem existed, the initial duty cycle can only be set to 0.1, then slowly increase to 0.05; if the initial duty cycle is set greater than 0.1, the output will drop to around 2.5V.

Hi Gus,

I tested again and manually adjusted the duty cycle under Open_Loop, and found that the initial setting of 0.1 could not increase the output. Does this mean that it is not a problem of feedback compensation?

I am currently programming the program to the development board and then connecting it to the main board with jumper wires. I don't know if this will cause the above abnormalities.

Do you mean you connect the PWMs & ADCs on the MCU via jumper wires to the main board? 

I took another look at the code. There is some code in there to configure the comparators to trip the PWMs for protection. Both COMP1 and COMP2 are used. Per the datasheet, COMP1 is connected to A2/B2 and COMP2 is connected to A4/B4.

The code specifies the internal DAC is used for both, so I expect only A2 and A4 are being monitored. Per the design guide A2 is used to measure the panel current feedback (IPV) and A4 is used to measure the output current (IOUT). Since the current values in your setup are not looking right, I am wondering if this is tripping the PWMs to stop toggling. Can you check the COMPSTS register in each comparator?

Relevant code

	// Protection
	// Configure PWM1 and 2, Comparator1 and DAC for over current protection
	EALLOW;

	// COMP1
	Comp1Regs.COMPCTL.bit.COMPDACEN  =0x1;
	Comp1Regs.COMPCTL.bit.SYNCSEL    =0x0;	// asynchronous version of the COMP signal is passed to the EPWM/GPIO module
	Comp1Regs.COMPCTL.bit.CMPINV     =0x0;	// Output of the comparator is passed directly
	Comp1Regs.COMPCTL.bit.COMPSOURCE =0x0;	// inverting input of the comparator is connected to the internal DAC
	Comp1Regs.DACVAL.bit.DACVAL		 =768;	// set DAC (6/8)*1024 = 256

	//COMP2
	Comp2Regs.COMPCTL.bit.COMPDACEN  =0x1;
	Comp2Regs.COMPCTL.bit.SYNCSEL    =0x0;	// asynchronous version of the COMP signal is passed to the EPWM/GPIO module
	Comp2Regs.COMPCTL.bit.CMPINV     =0x0;	// Output of the comparator is passed directly
	Comp2Regs.COMPCTL.bit.COMPSOURCE =0x0;	// inverting input of the comparator is connected to the internal DAC
	Comp2Regs.DACVAL.bit.DACVAL		 =683;	// set DAC (10/15) *1024=137

	// Define an event (DCAEVT1 and DCBEVT1) based on Comparator 1 and 2 Output
	//EPWM1
	EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT; 	// DCAH = Comparator 1 output
	EPwm1Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP2OUT; 	// DCAH = Comparator 1 output
	EPwm1Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI; // DCAEVT1 = DCAH high(will become active
	EPwm1Regs.TZDCSEL.bit.DCBEVT1 = TZ_DCBH_HI; // DCBEVT1 = DCAH high(will become active
													// as Comparator output goes high)

	EPwm1Regs.DCACTL.bit.EVT1SRCSEL = DC_EVT1; 			// DCAEVT1 = DCAEVT1 (not filtered)
	EPwm1Regs.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC;	// Take async path

	EPwm1Regs.DCBCTL.bit.EVT1SRCSEL = DC_EVT1; // DCBEVT1 = DCBEVT1 (not filtered)
	EPwm1Regs.DCBCTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC;// Take async path

	// Enable DCAEVT1 and DCBEVT1 as a one-shot source
	// Note: DCxEVT1 events can be defined as one-shot.
	// DCxEVT2 events can be defined as cycle-by-cycle.
	EPwm1Regs.TZSEL.bit.DCAEVT1 = 1;
	EPwm1Regs.TZSEL.bit.DCBEVT1 = 1;

	//EPWM2
	EPwm2Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT; 	// DCAH = Comparator 1 output
	EPwm2Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP2OUT; 	// DCAH = Comparator 1 output
	EPwm2Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI; // DCAEVT1 = DCAH high(will become active
	EPwm2Regs.TZDCSEL.bit.DCBEVT1 = TZ_DCBH_HI; // DCBEVT1 = DCAH high(will become active
													// as Comparator output goes high)

	EPwm2Regs.DCACTL.bit.EVT1SRCSEL = DC_EVT1; 			// DCAEVT1 = DCAEVT1 (not filtered)
	EPwm2Regs.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC;	// Take async path

	EPwm2Regs.DCBCTL.bit.EVT1SRCSEL = DC_EVT1; // DCBEVT1 = DCBEVT1 (not filtered)
	EPwm2Regs.DCBCTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC;// Take async path

	// Enable DCAEVT1 and DCBEVT1 as a one-shot source
	// Note: DCxEVT1 events can be defined as one-shot.
	// DCxEVT2 events can be defined as cycle-by-cycle.
	EPwm2Regs.TZSEL.bit.DCAEVT1 = 1;
	EPwm2Regs.TZSEL.bit.DCBEVT1 = 1;


	// Cycle By Cycle(CBC) interrupt for CPU halt trip
	EPwm1Regs.TZSEL.bit.CBC6=0x1;
	EPwm2Regs.TZSEL.bit.CBC6=0x1;

	// What do we want the OST/CBC events to do?
	// TZA events can force EPWMxA
	// TZB events can force EPWMxB

	EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // EPWMxA will go low
	EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // EPWMxB will go low

	EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // EPWMxA will go low
	EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // EPWMxB will go low

	// clear spurious trip
	EPwm1Regs.TZCLR.all=0;
	EPwm2Regs.TZCLR.all=0;

	EDIS;

Gus Martinez said:

Do you mean you connect the PWMs & ADCs on the MCU via jumper wires to the main board? 

Yes.

Gus Martinez said:

Can you check the COMPSTS register in each comparator?

I checked the values in the COMPSTS register under the condition that the input was 25V, VoutSet was set at 20V, and the output voltage dropped to 2.77V.

I found that the OP multiple of the output current in my circuit was wrong. After I replaced one of the resistors, the current value could be detected, but the error was relatively prominent.

After adding soft start, when the output voltage dropped, I found that Duty would jump between the upper limit value and 0, but the actual measured PWM output had no value.

I input 50V and output 30V when the loop is open, and use the SFRA GUI to scan the bandwidth, gain margin and phase margin, and find that the waveform is completely different from the waveform in the user guide.

What I measured is Vin = 50V Vout=30V

The user guide:

How to set the output load to 50 ohms? Is it because of the 50 ohms that my waveforms are different from the ones in the user guide?

I will reach out via email.

The following situation is that when I set a high output voltage, the output did not rise to the set value, but only slowly rose to the voltage of 2V. At that time, I did not observe how much the resolution was set.

Duty is 0.1.

CCS:DutyBuck is 0.2 and DutyBoost is 0.

PWM1A measured 0.17 and PWN2A measured 0.

Regards,

Katherine

Katherine Wang said:

3. What is the resolution on CH2? Looks like 20mV/div?? Why so small?

The following situation is that when I set a high output voltage, the output did not rise to the set value, but only slowly rose to the voltage of 2V. At that time, I did not observe how much the resolution was set.

My confusion is that CH2 is supposed to be PWM1, which is a digital signal, a resolution of 20mV/div doesn't make sense to me for a digital signal. Even on this new scope shows the peak value on the digital signal is ~400mV. Are the PWM signals being probed after some voltage divider? The 250kHz switching rate makes sense.

Katherine Wang said:

4. For the programmed Duty, what are the DutyBuck and DutyBoost calculated by the code (use CCS to view) and PWM duty cycle measured on PWM1A and PWM2A pins?

Duty is 0.1.

CCS:DutyBuck is 0.2 and DutyBoost is 0.

OK, this make sense. Per the design guide, when the Duty=0.1, the code operates in buck mode. In this mode, the buck PWM will be set to Duty*2 and the Boost PWM will be set to 0. So measured duty cycles make sense. A couple of things to note: 1. because of dead band setting the measure PWM duty cycle will not be exactly duty*2, 2. the programmed duty cycle is always multiplied by 2.

Code from BuckBoostBiDir-DPL.asm.

- LSL (left shift, i.e. multiply x 2)

- ZAPA (zero ACC)

		MOVW 	DP,#(_Duty)
		MOVL	ACC,@_Duty
		LSL		ACC,#1
		MOVL	@XAR0,ACC
		CMPL 	ACC,@_BuckModeMaxGain
		B BUCK_MODE, LT
		CMPL	ACC,@_BrAModeMaxGain
		B BRIDGE_MODE_A,LT
		CMPL	ACC,@_BrBModeMaxGain
		B BRIDGE_MODE_B,LT
		B BOOST_MODE, UNC

BUCK_MODE:
		MOVL	ACC,@XAR0
		MOVL	@_DutyBuck,ACC
		ZAPA
		MOVL	@_DutyBoost,ACC

It would be great if the duty cycle could be gradually increased, and the resulting Vout measured, as was done in the GainWorksheet. For a given Vin, we should be able to figure out of the power stage is behaving as expected.

Hi Gus,

I'll keep follow this case.

Gus Martinez said:

Are the PWM signals being probed after some voltage divider?

The customer measures the PWM signal directly without an external voltage divider. 

Gus Martinez said:

It would be great if the duty cycle could be gradually increased, and the resulting Vout measured, as was done in the GainWorksheet. For a given Vin, we should be able to figure out of the power stage is behaving as expected.

When the loop is open, the initial duty can only be set at 0.02, and then the rate of 0.02 increases slowly. If set directly to 0.1, or if the duty ratio is increased, the output rises to 2V and does not go up again. When duty slowly rises to Boost mode, the output drops to 2V.

Katherine Wang said:

I input 50V and output 30V when the loop is open, and use the SFRA GUI to scan the bandwidth, gain margin and phase margin, and find that the waveform is completely different from the waveform in the user guide.

What I measured is Vin = 50V Vout=30V

Is the issue with SFRA due to improper method or compensation issue with SFRA?

Why does the coefficients of 3p3z show "stable loop" when adjusted with compdesigner, but the set values cannot be output reliably?

And here's one thing we could take a look at: since the original design circuit always makes noise at the MOS output voltage and the higher the output voltage will cause MOS to burn, the customer adds a 220uF cap to the output and the MOS will not be noisy and will not burn.

Trying to remove the capacitance today, they found that Vin 42V, VoutSet set to 30V would stabilize the voltage at 30V, but MOS still had a sound.

MOS will not work when the output is tuned to 40V. The customer then put the 220uF cap on it and found that the output voltage could not rise when the VoutSet was set to 30V, and it could only increase by a ratio of 5V, but the MOS was not noisy.

The following are the waveforms for PWM1A and PWM1B with Vin 42V, Vout 30V, Output plus 10uF, 220uF capacitance and no capacitance applied: 

No cap:

10uF cap:

220uF cap(cannot rise directly to 30 V):

The following is a wave form that gradually increases the VoutSet to 30V at 5V with 220uF capacitance added:

220uF Capacitance:

The customer found that the signal was more stable with the capacitance filter out noise, but there was an issue where the initial VoutSet could not be set too high (as was the duty in the open loop).

The customer also scan the SFRA:

Vin 42V, Vout 30V, No Load, No Capacitance: 

Vin 42V, Vout 20V, loaded 50 Ohm, No Capacitance: (Loaded at Vout 30V and the output drops directly to 0 V)

The customer would like to know if a medium capacitance less than 220uF should be added to the output which can make the MOS stable without affecting the VoutSet setting.

And regarding the issue, the voltage drop to 0 V at load, how to fix it?

Thanks and regards,

Cherry

Cherry,

I will review this information and respond to you by 3/28. 

Cherry Zhou said:

The customer measures the PWM signal directly without an external voltage divider. 

Does the customer have an explanation as to why the amplitude of the signal is so small even though the MCU has 3.3V I/O?

Cherry Zhou said:

When the loop is open, the initial duty can only be set at 0.02, and then the rate of 0.02 increases slowly. If set directly to 0.1, or if the duty ratio is increased, the output rises to 2V and does not go up again. When duty slowly rises to Boost mode, the output drops to 2V.

This is not expected behavior. Can the customer debug this further? What is the status of the PWM outputs when the duty is set to 0.1? If the PWM outputs are stopped, can the customer verify if a trip condition has been set and the root for that trip condition (overcurrent, overvoltage, etc.)?

Cherry Zhou said:

And here's one thing we could take a look at: since the original design circuit always makes noise at the MOS output voltage and the higher the output voltage will cause MOS to burn, the customer adds a 220uF cap to the output and the MOS will not be noisy and will not burn.

Can you indicate on the schematic where this capacitor placed and where the signal is being measured? 

Hi Gus,

Gus Martinez said:

This is not expected behavior. Can the customer debug this further? What is the status of the PWM outputs when the duty is set to 0.1? If the PWM outputs are stopped, can the customer verify if a trip condition has been set and the root for that trip condition (overcurrent, overvoltage, etc.)?

Gus Martinez said:

Does the customer have an explanation as to why the amplitude of the signal is so small even though the MCU has 3.3V I/O?

The above problem may be caused by adding a 220uF cap to the output since when the cap is removed, the Duty is adjusted in the open loop and the VoutSet is adjusted in the loop, the output will not drop to 2V again.

As to why the signal resonance is so small when it falls to 2V, the customer thinks that there is no signal at this time (duty = 0), which is the noise seen by amplifying the resolution.

Gus Martinez said:

Can you indicate on the schematic where this capacitor placed and where the signal is being measured? 

Thanks and Regards,

Cherry

Cherry,

Let me clarify my question on the PWM output signal amplitude. Is this customer scope snapshot below showing the PWM amplitude is 400mV? The amplitude should be closer to 3.3V. 

Where are the PWM outputs being measured? If possible, the PWM outputs should be measured at TP118, TP119, TP126, and TP127. I am assuming these test points are present on the customer hardware. The 200uF capacitor added the output of the buck-boost power stage should not have an effect on the PWM signal amplitude. 

Cherry Zhou said:

As to why the signal resonance is so small when it falls to 2V, the customer thinks that there is no signal at this time (duty = 0), which is the noise seen by amplifying the resolution.

Yes, of course, if a trip condition has been created due to overcurrent, overvoltage, or similar, the PWMs will stop switching and they will go to 0V. However, when there is no trip condition and the PWMs are switching normally, the signal amplitude should be closer to 3.3V. All the customer scope waveforms of the PWM outputs show this ~400mV amplitude. I want to make sure the UCC gate drivers in the buck-boost power stage are getting the correct PWM signal amplitude.

I also want to make clear that the focus should be to get the hardware and software working in OPEN LOOP. We need to be able to raise the duty cycle to any point and operate the circuit in buck or boost stage. If this cannot work, then there is no chance to get the design to work in closed loop.

Hi Gus,

Gus Martinez said:

Where are the PWM outputs being measured?

The test points are the same as in the figure.

Gus Martinez said:

when there is no trip condition and the PWMs are switching normally, the signal amplitude should be closer to 3.3V.

Yes, the signal amplitude will be so small because the probe reduces the signal by 10 times, and after remeasuring the waveform, the signal amplitude will be exactly 3.3V. 

Also, the Duty for Boost is 0, but a pulse is generated at a time. The purpose is to charge the C3, correct? And is this setting a part of the program? if so, which part?

Could you help check this case? Thanks.

Best Regards,

Cherry

Cherry,

Thank you for confirming the PWM signal amplitude!

Yes, that pulse is to charge the bootstrap capacitor. The code for that is include in BuckBoostBiDir-DPL.asm.

Can we please have the customer configure the test setup as described in section 5.1 Hardware Setup Instructions of the design guide. Specifically, Vin=60V and Load = 50Ohms.

The code needs to be configured in OPEN_LOOP = 1. The duty can be gradually increased and PWM duty cycles and Vout can be measured manually. We need to obtain stable results in this test setup before moving on.

I want to ask about the load the customer is using too. Can we clarify what is this load in the customer setup? If it is some big wirewound resistor, the inductance in that device may affect the operation of the circuit in CLOSED loop. In fact, for this OPEN_LOOP test, the customer can operate the system WITHOUT a load since the control loop is disabled. 

Hi Gus,

Manually adjust DUTY by entering 60 V (no load) under open loop. The following DUTY values are 0.1, 0.2 and 0.3 respectively and it is found that DUTY will automatically shut down above 0.2: 

DUTY:0.1

DUTY:0.2

DUTY:0.3

The customer uses the following electronic load machines to apply the load: 

Thanks and Regards,

Cherry

Cherry,

All indications point to the PWMs being tripped. I took another look at the code and the MCU comparators are being configured to monitor the Ipv and Iout currents. If the currents exceed some value, the PWMs will automatically trip. Can you have the customer check the EPwm1Regs.TZFLG.bit.DCAEVT1 and EPwm1Regs.TZFLG.bit.DCBEVT1 flags when the code stops in OPEN_LOOP=1 and Duty>0.2?

The customer previously reported the following voltages at ADC-A4. These look completely wrong. This could be the source of the trip for the system. For reference, ADC-A4 at 0A should be about 1.65V. 

Katherine Wang said:

The voltages of ADC_A4 measured are listed as:

Vin  Vout   A4

25    15     0.146

25    20     0.146

25    15     0.145

15    20     0.145

15    25     0.145

In the case of changing the input and output voltages, the voltage of A4 is maintained at about 0.145V.

Hi Gus,

Gus Martinez said:

Can you have the customer check the EPwm1Regs.TZFLG.bit.DCAEVT1 and EPwm1Regs.TZFLG.bit.DCBEVT1 flags when the code stops in OPEN_LOOP=1 and Duty>0.2?

DCBEVT1 became 1.

Gus Martinez said:

ADC-A4 at 0A should be about 1.65V. 

Customer has reviewed and modified it which is about 1.65V now.

Thanks and regards,

Cherry

Cherry,

Cherry Zhou said:

Customer has reviewed and modified it which is about 1.65V now.

Does the customer still see the trip after the modification? Can you clarify?

Hi Gus,

My apology, please let me clarify: only the ADC-A4 voltage is good while the trip issue still persist.

Thanks and regards,

Cherry

If EPwm1Regs.TZFLG.bit.DCBEVT1 = 1, then that means the comparator is still detecting a bad current reading from ADC-A4. Customer needs to debug the input to the ADC and determine the root cause.