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TMS320F28379D: Update pwm pre-scaler on behavior

José Arbugeri
Prodigy 50 points
Part Number: TMS320F28379D


I am changing the PWM prescaler in real time to generate a variable frequency PWM signal on the DSP 28379D to implement a model of a PickUp. However, I noticed that this change is causing discontinuities in the PWM signal generation transition. This is happening because I cannot update the prescaler at the beginning of the period. I believe that it always updates immediately and I couldn't find any register that could help me with this. What could be done?

When I change the prescaler generic from 1 to 14, it seems that there is a moment when it disables the PWM. Is this a normal behavior of the ePWM module? The figure bellow show the moment that i change 1 to 14 div clock.

#define PWM_CLOCK_GENERIC_PRESCALE_1 0x0
#define PWM_CLOCK_GENERIC_PRESCALE_14 0x7



  • 0
    TI__Mastermind 26346 points

    Hi Jose,

    When you refer to the generic pre-scale, do you mean updating the HSPCLKDIV real time? 

    Best,

    Ryan Ma

  • 0 in reply to Ryan Ma
    Prodigy 50 points

    Hi Ryan, i'm changing both pre-scale. yes, generic pre-scale refer to TBCTL.bit.HSPCLKDIV in my code

  • 0 in reply to José Arbugeri
    TI__Mastermind 26346 points

    Hi Jose,

    HSPCLKDIV or any of the click dividers in general should not be changed on the fly. 

    Instead, could you try changing the period (TBPRD) of the PWM?

    Best,

    Ryan Ma

  • 0 in reply to Ryan Ma
    Prodigy 50 points

    I am changing the TBPRD period, however, I need a wide frequency range in a low-frequency region (1Hz to 20Khz). I have created an algorithm that calculates the prescaler to achieve maximum resolution at the selected frequency. So basically, I am using all options for the pre-scaler clkdiv and hspclkdiv.

  • 0 in reply to José Arbugeri
    TI__Mastermind 26346 points

    Hi Jose,

    If you are changing the prescaler (/4 then changing to be /8 for example), it is not recommended to do so during real time operation. This will yield some unexpected behavior. I had confirmed this with design. 

    Best,

    Ryan Ma

  • 0 in reply to Ryan Ma
    Prodigy 50 points

    Thank you for the feedback, Ryan. One last question, is there any reason why the PWM module's counter is only 16 bits? Do you have any suggestions for implementing a low-frequency PWM (0-40 Hz) using another peripheral or perhaps through software? I took a look at the CLB, but from what I saw, I can't do PWM there because the inputs are limited.

  • 0 in reply to José Arbugeri
    TI__Mastermind 26346 points

    Hi Jose, 

    I will need to see how you can achieve this, and will get back to you tomorrow by end of day.

    Best,

    Ryan Ma

  • 0 in reply to Ryan Ma
    TI__Mastermind 26346 points

    Hi Jose,

    If you are trying to have a range from 40Hz - 20kHz and assuming you are running at SYSCLK 200Mhz, your EPWM clock (EPWMCLKDIV = /2) will be 100Mhz. 

    Assuming in up-down count mode to achieve this wide range you can enable HRPWM when you're running at 20kHz and then disable HRPWM when running at the lower frequency range.

    I would suggest to have your CLKDIV = /4, and your HSPCLKDIV = /6. Thus giving you a /24. Your max TBPRD when running at 40Hz would be 52083 and your TBPRD at 20kHz would be 104. HRPWM will allow you to have a higher resolution at 20kHz when you enable it, Right now your resolution at 20Khz without HRPWM would be ~6 bits but enabling HRPWM you can achieve higher bits of resolution.

    Best,

    Ryan Ma