TMS320F28388D: Timestamping events on CPU1 and CPU2 with the same time base

Johannes von Löwis

I wish to timestamp events (such as ISR entry) on both CPU1 and CPU2 using the same time base. When working with only one CPU I just stored the TSCTR of an ECAP in global variables.

Is there a 32 bit timer available that is accessible by both CPU1 and CPU2 that I could use for that purpose?

If not, what else could I do?

Best regards

Johannes

over 3 years ago

0 Omer Amir over 3 years ago

TI__Mastermind 30185 points

Hello Johannes,

I will look into this device to see what timers are available that have a time base that both CPUs can use. I will try to have a response by Monday.

Best regards,

Omer Amir

0 Omer Amir over 3 years ago

TI__Mastermind 30185 points

Hi Johannes,

Have you tried using the CPU timer for this device? You should be able to read this counter from both CPUs, which can be used as a time base.

Best regards,

Omer Amir

0 Johannes von Löwis over 3 years ago in reply to Omer Amir

Expert 1816 points

Hi Omer,

from spruii0d.pdf, Section 3, Figure 3-1, I gather that each CPU has their on set of CPU timers, the values of which would differ unless I managed to start them simultaneously.

Best regards

Johannes

+1 Omer Amir over 3 years ago in reply to Johannes von Löwis

TI__Mastermind 30185 points

Hello Johannes,

There is an IPC 64-bit free-running counter which can be used to timestamp IPC events by reading the IPCCOUNTERL and then the IPCCOUNTERH registers. You can read more details on this in the Free-Running Counter section of the IPC chapter (section 16.5, page 1936).

Best regards,

Omer Amir

0 Johannes von Löwis over 3 years ago in reply to Omer Amir

Expert 1816 points

Hello Omer,

thank you for your response. The IPC timer is what I was looking for.

Best regards,

Johannes

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TMS320F28388D: Timestamping events on CPU1 and CPU2 with the same time base