TMS320F28379D: How to receive 32-bit data through McBSP?

The PC sends the data as follows,

Cody

Hi Cody,

There are McBSP examples within C2000. More specifically there is an external loopback example that sends and receives 32-bit data with the McBSP in SPI mode. This code can be used as a reference for what you are implementing.

C:\ti\c2000\C2000Ware_version\driverlib\f2837xd\examples\cpu1\mcbsp

Best Regards,

Marlyn

Hi Marlyn,

I have only connected two wires (MOSI and CLK) and I want to confirm that your suggestion for the method for McBSP's SPI mode will also work?

Thanks

Cody

Hi Cody,

Cody Chen said:

I have only connected two wires (MOSI and CLK) and I want to confirm that your suggestion for the method for McBSP's SPI mode will also work?

I believe you will still need to utilize the SPISTE line but I can confirm this early next week and get back to you.

Best Regards,

Marlyn

Hi Marlyn,

I will wait patiently for good news.

I have a customer who uses TMS320LF2407 to receive this kind of data stream, they only connect two lines (32-bit data and 1MHz clock, interval 100usec), and always work in receive mode. I don't know how they implement this requirement. I see that McBSP can be used instead of I2S. And I2S only has Data and Clock, so I also used McBSP to try to realize this application.

Thanks

Cody

Hi Cody,

Cody Chen said:

I see that McBSP can be used instead of I2S. And I2S only has Data and Clock, so I also used McBSP to try to realize this application.

When McBSP is setup in SPI mode then it should operate as the same communication protocol as SPI. What is the SPISTE connected to in your design?

Note this is what the TRM states: "The master device controls the flow of communication by providing shift-clock and slave-enable signals. The slave-enable signal is an optional active-low signal that enables the serial data input and output of the slave device (device not sending out the clock).

In the absence of a dedicated slave-enable signal, communication between the master and slave is determined by the presence or absence of an active shift-clock. When the McBSP is operating in SPI master mode and the SPISTE signal is not used by the slave SPI port, the slave device must remain enabled at all times, and multiple slaves cannot be used."

For I2S format of communication, I believe the McBSP module needs to remain in McBSP mode not SPI Mode.

Cody Chen said:

I have a customer who uses TMS320LF2407 to receive this kind of data stream, they only connect two lines (32-bit data and 1MHz clock, interval 100usec), and always work in receive mode. I don't know how they implement this requirement.

Do you know if they are using the SPI module on the device for this communication?

Best Regards,

Marlyn

Hi Marlin,

They gave us the definition of 32 bits. They just connected two wires to F2407, then we monitor them and capture the waveform as below,

Two lines include 32bits data and 1MHz clock only. The interval between communication packets is between 100usec.

These two wires connect a master to multiple slaves. All slaves will wait to receive messages from the master.

They can't determine whether the mode of McBSP works in SPI mode or not. This way is my own guess. 

I'm trying to keep SPISTE connected all the way low and then receive 32bits of data, but I'm failing.

So I would like to ask for help, can anyone tell me how to receive this communication packet?

Thanks

Cody

Hi Cody,

Cody Chen said:

They just connected two wires to F2407

The F2407 device does not have the McBSP module so it would have been with the SPI protocol (F2407 has CAN, SPI, and SCI).  

Cody Chen said:

I'm trying to keep SPISTE connected all the way low and then receive 32bits of data, but I'm failing

Can you please describe how the communication is failing? 

In your setup, are other devices part of this communication or just the F28379D device?

Best Regards,

Marlyn

Hi Marlyn,

I did not proceed to try to use McBSP to receive this communication packet. I use SPI instead to receive such packets. My SPI is set to interrupt and FIFO mode. Always set SPISTE low to continue receiving data. I can now receive data. I applied the same method on McBSP, but it doesn't work.

Thanks

Cody

Hi Cody,

I am glad you were able to get this to work with SPI.

Cody Chen said:

I applied the same method on McBSP, but it doesn't work.

What happens in your test setup when you try to use McBSP?

Best Regards,

Marlyn

Hi Marlyn,

I applied the method's standard connections (three wires CS, MOSI and CLK to my board). They can receive data correctly. Then I send data after connecting CS to Low. The slave didn't respond. If the time between CS and Data is short, maybe a clock or three, then they receive data correctly. This is how I try to receive data with SPI peripheral, further confirm if it is the same. The result is definitely different.

Thanks

Cody

Thank you Cody,

So in conclusion you are able to use SPI to receive data with the CS line being driven continuously low. However, if the same thing is done with the McBSP module in SPI mode then data isn't received. 

I need to consult with other McBSP experts (who are currently out of office until next week). Please give me some time to consult with them on this and what the possible difference could be. I'll let you know as soon as I am able to speak with them, should be early next week. 

Best Regards,

Marlyn

Hi Marlyn,

I will wait patiently for good news.

Cody