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PWM issue at zero-crossing in Micro-inverter

Pranav Ananthakumar
Prodigy 170 points
Part Number: TMS320F280025


Hi all,

I am working on a solar micro-inverter for grid-tied application. The system is comprised of an interleaved boost stage, a step-up transformer and a voltage doubler. The interleaved boost stage is where the MOSFETs S1, S2, S3 and S4 are switching at high-frequency and modulating as a sine wave.

I am facing some problems with the PWM of the MOSFETs near zero-crossing. I am generating a PWM of 70 kHz(714 counts) and using 500ns deadband which corresponds to 50 counts. When grid current control is working, the duty counts near zero-cross reduces below 50 and hence I get no pulse output (MOSFET does not turn ON). In this condition, grid current falls to zero and hence my THD increases. How can I rectify this condition? Attaching waveforms below. Yellow is grid current and blue is MOSFET gate pulse.

Regards,

Pranav Ananthakumar

  • 0
    TI__Genius 11076 points

    Hello Pranav,

    I've run into this several times recently, unfortunately, and I'm not aware of a currently implemented device-side workaround.

    First and foremost, Is there any way for you to reduce the DB, bypassing the issue entirely? A DB that high relative to your TBPRD can be problematic, as you've noticed, and reduction there is the simplest way to reduce the impact on your system. 

    Regards,

    Jason Osborn

  • 0 in reply to Jason Osborn
    Prodigy 170 points

    Hi Jason,

    Reducing the deadband is the easiest way to mitigate this issue but the MOSFETs we use in our system have very high rise and fall times so we need to use the above mentioned deadband. If we use better and faster MOSFETs, we can easily achieve lower deadtimes and mitigate this issue. I was wondering if anyone had any approach through firmware in which we can mitigate this issue? Maybe reducing switching frequency near zero-crossing etc. I've tried this but it does not work :(

    Regards,

    Pranav Ananthakumar

  • 0 in reply to Pranav Ananthakumar
    TI__Genius 11076 points

    Pranav,

    Hmm, alright, I have another idea which requires me to ask another question. What is your current Action Qualifier (AQ) configuration? Additionally, how is your CMPx value calculated, if either CMPA/B is used at all?

    Depending on your answer, we may be able to adjust these values such that we introduce deadtime between the A/B side ePWM outputs without needing to use the DB submodule. This will allow us to lower the value of the DBRED/FED. I believe this idea is discussed in the TRM, though I cannot recall offhand where.

    Regards,

    Jason Osborn

  • 0 in reply to Jason Osborn
    Prodigy 170 points

    Jason,

    Currently, my Action Qualifier (AQ) configuration is CLEAR during counting UP and SET during counting DOWN. 

    My CMPA is calculated by (EPWM_TBPRD * Modulation Index). My EPWM_TBPRD is equal to counts for 70 kHz i.e. 714 and Modulation Index varies between (0 to 0.6) which comes from my PR controller output.

    Regards,

    Pranav Ananthakumar

  • 0 in reply to Pranav Ananthakumar
    TI__Genius 11076 points

    Pranav,

    For DB, are you using the AHC configuration?

    Regards,

    Jason Osborn

  • 0 in reply to Jason Osborn
    Prodigy 170 points

    Jason,

    Yes I am using the active high complementary configuration.

    Regards,

    Pranav Ananthakumar

  • 0 in reply to Pranav Ananthakumar
    TI__Genius 11076 points

    Pranav,

    If you set CMPA = your current CMPA calculation and set CMPB = CMPA + 50 at the same time, then have the AQ set such that

    AQ(ePWMxA) = Set at CMPB Up; Clear at CMPB Down
    AQ(ePWMxB) = Clear at CMPA Up; Set at CMPA Down

    This gets you a waveform identical to that of your AHC waveform, albeit possibly with slightly different duty calculations, if I'm not mistaken- I haven't had the opportunity to do the math myself. Additionally, it does not require use of the DB at all.

    This avoids the DB problem entirely, while still providing an AHC waveform with 50 TBCLK delay between edges. (AQ action on edge cases where CMPA/B are at or beyond PRD are fully known and documented in Table 17-8 in the device TRM)

    Does this work for you?

    Regards,
    Jason Osborn

  • 0 in reply to Jason Osborn
    Prodigy 170 points

    Jason,

    Thanks for your suggestion. It helped in removing the deadband module and induced deadband between my PWMs. We will test this on our hardware and see if it helps in mitigating our issue.

    I also tried another approach. Since my CMPA value is equal to (EPWM_TBPRD * Modulation Index), what if I keep my CMPA value such that its minimum value is 50 counts. So the expression would change to CMPA = (50 + (uint16_t)(EPWM_TBPRD * Modulation Index)). This also helped in mitigating the issue. I have attached a waveform of the same.

    Reagrds,

    Pranav Ananthakumar

  • +1 in reply to Pranav Ananthakumar
    TI__Genius 11076 points

    Pranav,

    That works as well! I'm happy to see you found a solution. Let me know if there's anything else for me to help with.

    Regards,
    Jason Osborn