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TMS320F280039C: PWM Signals Status Capture through Serial/Debug Port

Ramana BV
Prodigy 10 points

Part Number: TMS320F280039C

Greetings!

We are working on Three phase Vienna Rectifier design using 6 PWMs. We have a doubt that some PWMs are misbehaving. We are unable to monitor all 6 PWMs simultaneously on a DSO due to 4 channel scope. And unable to monitor on a Logic analyzer (LA) as LA was picking up lot of switching noise (of next stage FETs), hence not usable.

Is there a way to get data dump (on to a Debug port / UART) which shows status of 6 PWM output pins (showing on / off state)? PWM frequency is around 60KHz.

Thank you!

  • 0
    TI__Genius 11076 points

    Hello Ramana,

    Accessing the GPADAT registers for the relevant pins should let you see the current state of each, which can be done via debug. Would that be sufficient for your purposes?

    Regards,

    Jason Osborn

  • 0 in reply to Jason Osborn
    Prodigy 10 points

    Hello Jason,

    Yes, that is one way of checking the current state of the pins.

    But, those pins are switching at a much higher rate (i.e., 60KHz PWM). I think it is not possible via Debug, considering debug screen refresh rate. Please correct me if I am wrong.

    Is it possible via Debug to capture state of the pins which are changing at that rate?

    Is there any other method by using tools from TI meeting my requirement?

    Thank you,
    Ramana

  • 0 in reply to Ramana BV
    TI__Genius 11076 points

    Ramana,

    Unfortunately, I confirmed with my colleagues that what you're asking is not possible with the debugger. However, I will note that in the past, what I've done when needing to monitor several ports at once is to set up code to switch what signal is being brought to the port that is connected to the oscilloscope during runtime when a value in CCS debug is adjusted. While this doesn't let you view all of them at once, it does let you more easily switch between which is displayed, which makes debugging much easier.

    Alternatively, if the intended relationship between any two PWM signals is known, the CLB could be set up to output a T/F Boolean signal depending on if the current state of the signals matches what is expected, perhaps? This lets you lower the number of ports you need to monitor.

    Regards,

    Jason Osborn